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Merged
merged 9 commits into from
May 1, 2025
Merged

Dont depend on hal #6

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641115d
Dont depend on hal
usbalbin Apr 24, 2025
5647aa3
Remove connect pins
usbalbin Apr 24, 2025
7d13ccf
Move out device specific things to hals
usbalbin Apr 26, 2025
c65f87a
update pac
usbalbin Apr 26, 2025
1d59dbb
Update CI
usbalbin Apr 26, 2025
98141f2
fixes
usbalbin Apr 26, 2025
c3e19d1
Fix errors for f334 and h7
usbalbin Apr 26, 2025
0ef0808
Update examples
usbalbin Apr 26, 2025
5d259ce
clippy
usbalbin Apr 26, 2025
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39 changes: 14 additions & 25 deletions Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -7,17 +7,8 @@ edition = "2021"

stm32f3 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies", optional = true }
stm32h7 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies", fatures = ["critical-section"], optional = true }
#stm32g4 = { git = "", optional = true }
stm32g4 = { version = "0.21.0", package = "stm32g4-staging", optional = true }

#stm32f3xx-hal = { version = "0.10.0", optional = true }
stm32f3xx-hal = { git = "https://github.com/usbalbin/stm32f3xx-hal", branch = "update_for_new_pac", optional = true }
#stm32h7xx-hal = { version = "0.16.0", optional = true }
stm32h7xx-hal = { git = "https://github.com/usbalbin/stm32h7xx-hal", branch = "update_for_new_pac", optional = true }
#stm32h7xx-hal = { path = "../stm32h7xx-hal", optional = true }

#stm32g4xx-hal = { version = "0.0.1", optional = true }
stm32g4xx-hal = { git = "https://github.com/stm32-rs/stm32g4xx-hal", branch = "staged-pac", optional = true }
#stm32g4xx-hal = { path = "../stm32g4xx-hal", optional = true }
defmt = { version = "0.3.10", optional = true }
fugit = "0.3.7"

Expand All @@ -38,21 +29,19 @@ stm32f3 = ["stm32f3/stm32f3x4"]
stm32h7 = ["dep:stm32h7"]
stm32g4 = []

stm32f334x4 = ["stm32f3", "stm32f3xx-hal/stm32f334x4", "hrtim_v1"]
stm32f334x6 = ["stm32f3", "stm32f3xx-hal/stm32f334x6", "hrtim_v1"]
stm32f334x8 = ["stm32f3", "stm32f3xx-hal/stm32f334x8", "hrtim_v1"]

stm32h742 = ["stm32h7", "stm32h7xx-hal/stm32h742", "hrtim_v1_1"]
stm32h743 = ["stm32h7", "stm32h7xx-hal/stm32h743", "hrtim_v1_1"]
#stm32h745 = ["stm32h7", "stm32h7xx-hal/stm32h745", "hrtim_v1_1"]
stm32h747cm7 = ["stm32h7", "stm32h7xx-hal/stm32h747cm7", "hrtim_v1_1"]
stm32h750 = ["stm32h7", "stm32h7xx-hal/stm32h750", "hrtim_v1_1"]
stm32h753 = ["stm32h7", "stm32h7xx-hal/stm32h753", "hrtim_v1_1"]
#stm32h755 = ["stm32h7", "stm32h7xx-hal/stm32h755", "hrtim_v1_1"]
#stm32h757 = ["stm32h7", "stm32h7xx-hal/stm32h757", "hrtim_v1_1"]

stm32g474 = ["stm32g4", "stm32g4xx-hal/stm32g474", "hrtim_v2"]
stm32g484 = ["stm32g4", "stm32g4xx-hal/stm32g484", "hrtim_v2"]
stm32f334 = ["stm32f3/stm32f3x4", "hrtim_v1"]

stm32h742 = ["stm32h7/stm32h742", "hrtim_v1_1"]
stm32h743 = ["stm32h7/stm32h743", "hrtim_v1_1"]
#stm32h745 = ["stm32h7/stm32h745", "hrtim_v1_1"]
stm32h747cm7 = ["stm32h7/stm32h747cm7", "hrtim_v1_1"]
stm32h750 = ["stm32h7/stm32h750", "hrtim_v1_1"]
stm32h753 = ["stm32h7/stm32h753", "hrtim_v1_1"]
#stm32h755 = ["stm32h7/stm32h755", "hrtim_v1_1"]
#stm32h757 = ["stm32h7/stm32h757", "hrtim_v1_1"]

stm32g474 = ["stm32g4/stm32g474", "hrtim_v2"]
stm32g484 = ["stm32g4/stm32g484", "hrtim_v2"]
defmt = ["dep:defmt", "fugit/defmt"]

# F3
Expand Down
26 changes: 3 additions & 23 deletions src/capture.rs
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Original file line number Diff line number Diff line change
@@ -1,16 +1,9 @@
use crate::stm32;

use super::timer;

#[cfg(feature = "stm32g4")]
use crate::hal::dma::PeripheralToMemory;
#[cfg(feature = "stm32g4")]
use crate::mcu::DmaMuxResources;

use core::marker::PhantomData;
#[cfg(feature = "hrtim_v2")]
use stm32::HRTIM_TIMF;
use stm32::{HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME};
use crate::pac::HRTIM_TIMF;
use crate::pac::{HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME};
use core::marker::PhantomData;

pub struct Ch1;
pub struct Ch2;
Expand Down Expand Up @@ -258,19 +251,6 @@ macro_rules! impl_capture {
tim.isr().read().$cptX().bit()
}
}

#[cfg(feature = "stm32g4")]
unsafe impl<PSCL> crate::hal::dma::traits::TargetAddress<PeripheralToMemory> for HrCapt<$TIMX, PSCL, $CH, Dma> {
#[inline(always)]
fn address(&self) -> u32 {
let tim = unsafe { &*$TIMX::ptr() };
&tim.$cptXr() as *const _ as u32
}

type MemSize = u32;

const REQUEST_LINE: Option<u8> = Some(DmaMuxResources::$TIMX as u8);
}
};
}

Expand Down
4 changes: 2 additions & 2 deletions src/compare_register.rs
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Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
use core::marker::PhantomData;

#[cfg(feature = "hrtim_v2")]
use crate::stm32::HRTIM_TIMF;
use crate::stm32::{HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME};
use crate::pac::HRTIM_TIMF;
use crate::pac::{HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME};

pub trait HrCompareRegister {
fn get_duty(&self) -> u16;
Expand Down
172 changes: 26 additions & 146 deletions src/control.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4,78 +4,17 @@ use crate::fault::{
FltMonitor1, FltMonitor2, FltMonitor3, FltMonitor4, FltMonitor5, FltMonitorSys,
};

use crate::{hal, stm32};

#[cfg(feature = "stm32h7")]
use hal::rcc::ResetEnable as _;

#[cfg(not(feature = "stm32h7"))]
use hal::rcc::{Enable, Reset};

use stm32::HRTIM_COMMON;
use crate::pac::HRTIM_COMMON;

use super::{external_event::EevInputs, fault::FaultInputs};

pub trait HrControltExt {
fn hr_control(
self,
#[cfg(feature = "stm32f3")] _clocks: &hal::rcc::Clocks,
#[cfg(feature = "stm32f3")] apb2: &mut hal::rcc::APB2,

#[allow(unused_variables)]
#[cfg(feature = "stm32g4")]
rcc: &mut hal::rcc::Rcc,

#[cfg(feature = "stm32h7")] _clocks: &hal::rcc::CoreClocks,
#[cfg(feature = "stm32h7")] rcc: hal::rcc::rec::Hrtim,
) -> HrTimOngoingCalibration;
}

impl HrControltExt for HRTIM_COMMON {
fn hr_control(
self,
#[cfg(feature = "stm32f3")] _clocks: &hal::rcc::Clocks,
#[cfg(feature = "stm32f3")] apb2: &mut hal::rcc::APB2,

#[allow(unused_variables)]
#[cfg(feature = "stm32g4")]
rcc: &mut hal::rcc::Rcc,

#[cfg(feature = "stm32h7")] _clocks: &hal::rcc::CoreClocks,
#[cfg(feature = "stm32h7")] rcc: hal::rcc::rec::Hrtim,
) -> HrTimOngoingCalibration {
impl HrTimOngoingCalibration {
// The user is expected to have setup and enabled rcc clock to the peripheral
//
// Look in the hal for an corresponding extension trait for `HRTIM_COMMON`
pub unsafe fn hr_control() -> HrTimOngoingCalibration {
let common = unsafe { &*HRTIM_COMMON::ptr() };

let rcc = {
#[cfg(feature = "stm32g4")]
unsafe {
&*stm32::RCC::ptr()
}

#[cfg(feature = "stm32f3")]
{
apb2
}

#[cfg(feature = "stm32h7")]
{
{
let rcc = unsafe { &*hal::stm32::RCC::ptr() };
// Same clock source as CPU
rcc.cfgr().modify(|_, w| w.hrtimsel().c_ck());
}
rcc
}
};

#[cfg(not(feature = "stm32h7"))]
<HRTIM_COMMON as Enable>::enable(rcc);
#[cfg(not(feature = "stm32h7"))]
<HRTIM_COMMON as Reset>::reset(rcc);

#[cfg(feature = "stm32h7")]
rcc.enable().reset();

// Start calibration procedure
#[cfg(not(feature = "stm32h7"))]
common
Expand Down Expand Up @@ -359,85 +298,26 @@ pub struct HrPwmControl {
#[cfg(feature = "stm32g4")]
pub adc_trigger10: Adc10Trigger,
}

#[cfg(feature = "stm32g4")]
macro_rules! impl_adc1234_trigger {
($($t:ident: [$trait_:ident, $adcXr:ident, $variant345:ident $(, $variant12:ident)*]),*) => {$(
#[non_exhaustive]
pub struct $t;

impl $t {
pub fn enable_source<T: $trait_>(&mut self, _trigger: &T) {
let common = unsafe { &*HRTIM_COMMON::ptr() };
unsafe {
common.$adcXr().modify(|r, w| w.bits(r.bits() | T::BITS));
}
}
}

$(impl From<&$t> for hal::adc::config::ExternalTrigger12 {
fn from(_val: &$t) -> Self {
hal::adc::config::ExternalTrigger12::$variant12
}
})*

impl From<&$t> for hal::adc::config::ExternalTrigger345 {
fn from(_val: &$t) -> Self {
hal::adc::config::ExternalTrigger345::$variant345
}
}
)*}
}

#[cfg(feature = "stm32g4")]
macro_rules! impl_adc5678910_trigger {
($($t:ident: [$trait_:ident, $adcXtrg:ident, $variant345:ident, $variant12:ident]),*) => {$(
#[non_exhaustive]
pub struct $t;

impl $t {
pub fn enable_source<T: $trait_>(&mut self, _trigger: &T) {
let common = unsafe { &*HRTIM_COMMON::ptr() };
common
.adcer()
.modify(|_r, w| unsafe { w.$adcXtrg().bits(T::BITS as u8) });
}
}

impl From<&$t> for hal::adc::config::ExternalTrigger12 {
fn from(_val: &$t) -> Self {
hal::adc::config::ExternalTrigger12::$variant12
}
}

impl From<&$t> for hal::adc::config::ExternalTrigger345 {
fn from(_val: &$t) -> Self {
hal::adc::config::ExternalTrigger345::$variant345
}
}

)*}
}
#[cfg(feature = "stm32g4")]
impl_adc1234_trigger! {// reg adc345, adc12
Adc1Trigger: [Adc13Trigger, adc1r, Hrtim_adc_trg_1, Hrtim_adc_trg_1],
Adc2Trigger: [Adc24Trigger, adc2r, Hrtim_adc_trg_2],
Adc3Trigger: [Adc13Trigger, adc3r, Hrtim_adc_trg_3, Hrtim_adc_trg_3],
Adc4Trigger: [Adc24Trigger, adc4r, Hrtim_adc_trg_4]
}

#[cfg(feature = "stm32g4")]
impl_adc5678910_trigger! {
Adc5Trigger: [Adc579Trigger, adc5trg, Hrtim_adc_trg_5, Hrtim_adc_trg_5],
Adc6Trigger: [Adc6810Trigger, adc6trg, Hrtim_adc_trg_6, Hrtim_adc_trg_6],
Adc7Trigger: [Adc579Trigger, adc7trg, Hrtim_adc_trg_7, Hrtim_adc_trg_7],
Adc8Trigger: [Adc6810Trigger, adc8trg, Hrtim_adc_trg_8, Hrtim_adc_trg_8],
Adc9Trigger: [Adc579Trigger, adc9trg, Hrtim_adc_trg_9, Hrtim_adc_trg_9],
Adc10Trigger: [Adc6810Trigger, adc10trg, Hrtim_adc_trg_10, Hrtim_adc_trg_10]
}

#[cfg(feature = "stm32g4")]
use super::adc_trigger::{Adc13Trigger, Adc24Trigger, Adc579Trigger, Adc6810Trigger};
#[non_exhaustive]
pub struct Adc1Trigger;
#[non_exhaustive]
pub struct Adc2Trigger;
#[non_exhaustive]
pub struct Adc3Trigger;
#[non_exhaustive]
pub struct Adc4Trigger;
#[non_exhaustive]
pub struct Adc5Trigger;
#[non_exhaustive]
pub struct Adc6Trigger;
#[non_exhaustive]
pub struct Adc7Trigger;
#[non_exhaustive]
pub struct Adc8Trigger;
#[non_exhaustive]
pub struct Adc9Trigger;
#[non_exhaustive]
pub struct Adc10Trigger;

#[cfg(feature = "stm32g4")]
pub enum AdcTriggerPostscaler {
Expand Down
63 changes: 2 additions & 61 deletions src/external_event.rs
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Open in desktop
Original file line number Diff line number Diff line change
@@ -1,15 +1,5 @@
use crate::stm32;

#[cfg(feature = "stm32g4")]
use crate::hal::comparator::{COMP1, COMP2, COMP3, COMP4, COMP5, COMP6, COMP7};
#[cfg(feature = "stm32g4")]
use crate::hal::gpio::gpiob::{PB3, PB4, PB5, PB6, PB7, PB8, PB9};
#[cfg(feature = "stm32g4")]
use crate::hal::gpio::gpioc::{PC11, PC12, PC5, PC6};
#[cfg(feature = "stm32g4")]
use crate::hal::gpio::{self, AF13, AF3};
use crate::pac::HRTIM_COMMON;
use crate::Polarity;
use stm32::HRTIM_COMMON;

use super::control::HrTimCalibrated;

Expand Down Expand Up @@ -58,55 +48,6 @@ pub unsafe trait EevSrcBits<const EEV_N: u8>: Sized {
fn cfg(self) {}
}

#[cfg(feature = "stm32g4")]
macro_rules! impl_eev_input {
($($N:literal: COMP=[$compX:ident $(, ($compY:ident, $compY_src_bits:literal))*], PINS=[$(($pin:ident, $af:ident)),*])*) => {$(
$(unsafe impl<IM> EevSrcBits<$N> for $pin<gpio::Input<IM>>{
const SRC_BITS: u8 = 0b00;
fn cfg(self) {
self.into_alternate::<$af>();
}
})*

unsafe impl<ED> EevSrcBits<$N> for &crate::hal::comparator::Comparator<$compX, ED>
where ED: crate::hal::comparator::EnabledState
{
const SRC_BITS: u8 = 0b01;
}

$(
unsafe impl<ED> EevSrcBits<$N> for &crate::hal::comparator::Comparator<$compY, ED>
where ED: crate::hal::comparator::EnabledState
{
const SRC_BITS: u8 = $compY_src_bits;
}
)*

impl EevInput<$N> {
pub fn bind<const IS_FAST: bool, SRC>(self, src: SRC) -> SourceBuilder<$N, IS_FAST>
where SRC: EevSrcBits<$N>
{
src.cfg();
unsafe { SourceBuilder::new(SRC::SRC_BITS) }
}
}
)*};
}

#[cfg(feature = "stm32g4")]
impl_eev_input! {
1: COMP = [COMP2], PINS = [(PC12, AF3)]
2: COMP = [COMP4], PINS = [(PC11, AF3)]
3: COMP = [COMP6], PINS = [(PB7, AF13)]
4: COMP = [COMP1, (COMP5, 0b10)], PINS = [(PB6, AF13)]
5: COMP = [COMP3, (COMP7, 0b10)], PINS = [(PB9, AF13)]
6: COMP = [COMP2, (COMP1, 0b10)], PINS = [(PB5, AF13)]
7: COMP = [COMP4], PINS = [(PB4, AF13)]
8: COMP = [COMP6, (COMP3, 0b10)], PINS = [(PB8, AF13)]
9: COMP = [COMP5, (COMP4, 0b11)], PINS = [(PB3, AF13)]
10: COMP = [COMP7], PINS = [(PC5, AF13), (PC6, AF3)]
}

#[derive()]
pub enum EdgeOrPolarity {
Edge(Edge),
Expand Down Expand Up @@ -197,7 +138,7 @@ pub struct SourceBuilder<const N: u8, const IS_FAST: bool> {

#[cfg(feature = "stm32g4")]
impl<const N: u8, const IS_FAST: bool> SourceBuilder<N, IS_FAST> {
unsafe fn new(src_bits: u8) -> Self {
pub unsafe fn new(src_bits: u8) -> Self {
Self {
src_bits,
edge_or_polarity_bits: 0, // Level sensitive
Expand Down
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