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@Robbepop Robbepop commented Aug 29, 2025

Closes #1642.

New Wasmi IR bytecode that stores immediates inline instead of relying on function local constants.
This new Wasmi IR is generated via build.rs script and thus out of the box way more consistent than its precursor.
The new IR supports encoding the instruction stream into a byte stream and decode it from a byte stream back into instructions.

The following features are supported:

  • enum Op: type similar to Wasmi's current Instruction type
  • enum OpCode: Op discriminants encoded as u16 - helps with threaded code encoding
  • Encode & Decode: safe encoding of Op (and its components) and unsafe but efficient decoding of Op.
    • This encode and decode scheme was designed with direct and indirect threaded code architecture in mind.
  • Encoder and Decoder traits that are going to be implemented in the wasmi crate by respective types.

Unblocks the following issues:

ToDos

  • Add missing simd operators.
    • v128.load memarg: (i32) -> (v128)
    • v128.store memarg: (i32 v128) -> ()
    • v128.load8x8_s memarg: (i32) -> (v128)
    • v128.load8x8_u memarg: (i32) -> (v128)
    • v128.load16x4_s memarg: (i32) -> (v128)
    • v128.load16x4_u memarg: (i32) -> (v128)
    • v128.load32x2_s memarg: (i32) -> (v128)
    • v128.load32x2_u memarg: (i32) -> (v128)
    • v128.load8_splat memarg: (i32) -> (v128)
    • v128.load16_splat memarg: (i32) -> (v128)
    • v128.load32_splat memarg: (i32) -> (v128)
    • v128.load64_splat memarg: (i32) -> (v128)
    • v128.load8_lane memarg laneidx: (i32 v128) -> (v128)
    • v128.load16_lane memarg laneidx: (i32 v128) -> (v128)
    • v128.load32_lane memarg laneidx: (i32 v128) -> (v128)
    • v128.load64_lane memarg laneidx: (i32 v128) -> (v128)
    • v128.store8_lane memarg laneidx: (i32 v128) -> ()
    • v128.store16_lane memarg laneidx: (i32 v128) -> ()
    • v128.store32_lane memarg laneidx: (i32 v128) -> ()
    • v128.store64_lane memarg laneidx: (i32 v128) -> ()
    • v128.load32_zero memarg: (i32) -> (v128)
    • v128.load64_zero memarg: (i32) -> (v128)
  • Add missing relaxed-simd operators.
    • I16x8RelaxedDotI8x16I7x16S
    • I32x4RelaxedDotI8x16I7x16AddS
    • F32x4RelaxedMadd
    • F32x4RelaxedNmadd
    • F64x2RelaxedMadd
    • F64x2RelaxedNmadd

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codecov bot commented Aug 29, 2025

Codecov Report

❌ Patch coverage is 0% with 425 lines in your changes missing coverage. Please review.
✅ Project coverage is 68.71%. Comparing base (f7c77a7) to head (0d2cf4b).

Files with missing lines Patch % Lines
crates/ir2/src/span.rs 0.00% 101 Missing ⚠️
crates/ir2/src/decode/op.rs 0.00% 80 Missing ⚠️
crates/ir2/src/primitive.rs 0.00% 51 Missing ⚠️
crates/ir2/build/display/utils.rs 0.00% 28 Missing ⚠️
crates/ir2/build/display/decode.rs 0.00% 21 Missing ⚠️
crates/ir2/src/index.rs 0.00% 18 Missing ⚠️
crates/ir2/build/display/constructors.rs 0.00% 17 Missing ⚠️
crates/ir2/src/encode.rs 0.00% 17 Missing ⚠️
crates/ir2/build/display/op.rs 0.00% 16 Missing ⚠️
crates/ir2/build/display/encode.rs 0.00% 15 Missing ⚠️
... and 10 more
Additional details and impacted files
@@            Coverage Diff             @@
##             main    #1650      +/-   ##
==========================================
- Coverage   70.65%   68.71%   -1.95%     
==========================================
  Files         179      199      +20     
  Lines       15243    15668     +425     
==========================================
- Hits        10770    10766       -4     
- Misses       4473     4902     +429     

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@Robbepop Robbepop marked this pull request as ready for review September 2, 2025 09:04
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Redesign Wasmi bytecode
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