Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
293 commits
Select commit Hold shift + click to select a range
bcf66b0
update yamls, add bus info
irodushka Apr 2, 2025
5f0a14d
tmp version with TI dump
irodushka Apr 2, 2025
8f94015
many fixes in yaml & logic
irodushka Apr 4, 2025
b125191
fix in pe_sync logging
irodushka Apr 4, 2025
f2bc4bf
add rd_mask(RD macro) to parser + fixes for LMX2820
irodushka Apr 4, 2025
238e7d3
add init regs + fixes
irodushka Apr 4, 2025
21b3099
add all regs from dump
irodushka Apr 4, 2025
f3d6774
comment out soft-reset
irodushka Apr 4, 2025
8624139
add R19 R20
irodushka Apr 4, 2025
3fa29fb
APLL2 - fix try, rom again
irodushka Apr 4, 2025
9ba4d33
APLL2 fixed
irodushka Apr 4, 2025
b4fbe67
fix 05318 solver for 1 APLL2 out
irodushka Apr 4, 2025
c24b1e6
fix lock & LOS flags reset
irodushka Apr 5, 2025
5f2dc33
extra comments
irodushka Apr 5, 2025
caaf9ce
fix BAW lock
irodushka Apr 5, 2025
28f7a6e
add all regs from dump to init()
irodushka Apr 5, 2025
f000625
Final (I hope) BAW detect fix + rm redundant code
irodushka Apr 5, 2025
0b386db
refactoring
irodushka Apr 5, 2025
a10bece
fix in solver + APLL2 programmed denum
irodushka Apr 6, 2025
a5fc2f9
minor fixes & code cleaning
irodushka Apr 7, 2025
22aaf53
update ext_simplesync logic
irodushka Apr 7, 2025
42dfb07
Merge branch 'feature_pe_sync_ordered_regs_load' into feature_pe_sync
irodushka Apr 7, 2025
c9d51c8
fix accuracy for lmx2820
irodushka Apr 7, 2025
089bdb1
add CGD (common greatest divider) to VCOs num/den
irodushka Apr 7, 2025
b261a88
lmx2820 lmx1 added to pe_sync
irodushka Apr 7, 2025
c070e79
add logging
irodushka Apr 7, 2025
9ad1e86
fix memset
irodushka Apr 7, 2025
43025c1
fix mash order
irodushka Apr 7, 2025
79599aa
add lmx2820 dump for testing
irodushka Apr 7, 2025
9e942f5
llog fmt fix
irodushka Apr 7, 2025
0976ee7
comment out lmx2820 reset + fix for osc_2x detection
irodushka Apr 7, 2025
5811bcf
try to fix lmx2820 reset
irodushka Apr 7, 2025
33d6482
skip reset
irodushka Apr 8, 2025
abd3251
add LMX1214 support (need testing)
irodushka Apr 9, 2025
1c846f9
extra logging
irodushka Apr 9, 2025
96900ce
add lmx1214 test dump
irodushka Apr 9, 2025
119e044
several minor changes + print all regs in create()
irodushka Apr 10, 2025
3fe421e
lmx1204 first stub
irodushka Apr 10, 2025
64b6c2c
lmx1204 works, 1214 fails
irodushka Apr 10, 2025
e9fdaba
code cleaning & fixes in regs. Stable
irodushka Apr 11, 2025
5e66c9e
LMX2124 1)fix for aux.disables 2)prec mode
irodushka Apr 11, 2025
d97d76a
lmx1204 (not ready yet)
irodushka Apr 11, 2025
1625f78
lmx1204 - solver completed (except registers), unit-test added
irodushka Apr 11, 2025
2aa6dac
lmx1204 add regs, lock etc
irodushka Apr 12, 2025
5093b96
add LMX2820[0] & LMX1204 to pe_sync
irodushka Apr 12, 2025
50a6533
minor changes
irodushka Apr 12, 2025
cfd1489
add forgotten test
irodushka Apr 12, 2025
e1f2c63
LMK05380 add log
irodushka Apr 12, 2025
724b3a9
sporadic fixes to make lmx2820 work
irodushka Apr 12, 2025
fcdf1c2
LMX1204 individual sysref delays settings
irodushka Apr 13, 2025
260757d
LMX1204/1214 sync wnd capture + refactoring
irodushka Apr 13, 2025
0cef8ab
move spi common funcs to common.c
irodushka Apr 15, 2025
fc07372
lite refactoring
irodushka Apr 15, 2025
d755b8a
refactoring + fix + skip 2820 reset
irodushka Apr 15, 2025
1b9f62e
DPLL added - testing needed
irodushka Apr 16, 2025
435a65e
minors
irodushka Apr 16, 2025
589eda9
LMK - add load DPLL from dump
irodushka Apr 16, 2025
dadd630
multiple LMK DPLL regs fixes
irodushka Apr 17, 2025
980a93d
enable GPS & minor fix
irodushka Apr 18, 2025
06870a6
add terra-incognita LMK DPLL registers, it works sometimes
irodushka Apr 18, 2025
e30bad9
LMK DPLL fixes
irodushka Apr 18, 2025
027eebe
minor LMK fix
irodushka Apr 18, 2025
0eb4413
minor fixes
irodushka Apr 18, 2025
85103f4
LMK DPLL another dump
irodushka Apr 18, 2025
1067f22
another DPLL patch bundle
irodushka Apr 19, 2025
e927276
LMK add empirical regs set (for debug)
irodushka Apr 19, 2025
a0cd2bf
minor fixes & comments
irodushka Apr 19, 2025
8246166
wait functions refactoring, timeout more accurate
irodushka Apr 19, 2025
90c0995
minor change for debug
irodushka Apr 20, 2025
4e41e36
LMK DPLL registers cleared:
irodushka Apr 20, 2025
962fb48
minor change
irodushka Apr 20, 2025
fdd62a1
several fixes in LMK DPLL regs
irodushka Apr 21, 2025
c916e99
LMK yaml upd + minor changes
irodushka Apr 21, 2025
9e44ce2
inscrease lock timeouts - due to timeout functions change several com…
irodushka Apr 21, 2025
36d6daf
LMK APLL1 tune refactoring
irodushka Apr 22, 2025
3a4c890
DPLL ZDM refactored & several minor refact
irodushka Apr 23, 2025
c244c10
fix err in prev commit + refact + additional log
irodushka Apr 23, 2025
580b98c
APLL1 additional check
irodushka Apr 23, 2025
44cea4b
fix inaccuracy in OUT7 div calculation
irodushka Apr 25, 2025
96f4874
lmx1204 does not lock
irodushka May 1, 2025
6454c6c
LMX1204 works (except multiplier mode), LMX1214 - AUXCLK doesn't work…
irodushka May 2, 2025
8ecca2a
Add distributers LMK1D1208i for LMX1204 LOGICLK/LOGICREF
irodushka May 3, 2025
a743ca8
LMX1204 MULT mode lock fixed
irodushka May 3, 2025
db69a4c
LMX2820 SYSREF added (not tested)
irodushka May 4, 2025
56ebff4
LMX2820@PESync SYSREF implementation
irodushka May 5, 2025
60b22bd
fix in LMX2820 solver for SROUT. SROUT still not working
irodushka May 6, 2025
a7e94ce
enable DPLL + timeout 4min
irodushka May 6, 2025
27c95d6
minor cleaning
irodushka May 19, 2025
44e639d
cleaning before merge [1]
irodushka May 19, 2025
1dfd824
cleaning before merge [2]
irodushka May 19, 2025
34f414d
cleaning before merge [3] + simplesync/dsdr
irodushka May 19, 2025
a5ca650
Merge branch 'main' into feature_pe_sync
irodushka May 19, 2025
1d33334
lmk05318 fixpack for simplesync, dsdr & pe_sync
irodushka May 20, 2025
d66111c
code a bit more safe
irodushka May 20, 2025
f78763b
simplesync cut-off frequency corrected
irodushka May 21, 2025
960925d
increase LMK max out freq setting + new unit-test
irodushka May 21, 2025
1a7b91a
xmass: add initial support
sergforce May 21, 2025
3b192c4
fix for multithreading accesing the same bus
sergforce May 21, 2025
0d102d4
add check APLL locks for XMASS
irodushka May 21, 2025
9c71c09
LMK - add settings for XO=26M
irodushka May 21, 2025
fc4a60f
fix minor issuies
sergforce May 22, 2025
98d8e33
try te fix XMASS freq change, +extra diagnostic +lite refact
irodushka May 22, 2025
9502516
xmass: lmk05318b soft reset fails retune APPL2 on preconfigured syste…
sergforce May 22, 2025
bd43313
add extra LMK out types
irodushka May 22, 2025
f45dde8
make LMK APLL1 fdiv calculation more flexible
irodushka May 22, 2025
f711f29
LMK refactoring, disable if freq==0, new api to enable/disable ports
irodushka May 22, 2025
fd7d368
add & correct LMK APLL1 checks for dpll-mode
irodushka May 23, 2025
022e27a
add define macro for disabling dpll-mode checks (XO25M case)
irodushka May 23, 2025
0093407
LMK: improving XO chain solver, refactoring, XO=12.8M settings
irodushka May 24, 2025
570ff4e
xsdr wip
sergforce May 26, 2025
5ff19fa
fix
sergforce May 26, 2025
c6bf96a
lmk05138b: skip soft sync since it fails somehow
sergforce May 26, 2025
a9e521f
LMK create() refactored, xo params simplified
irodushka May 27, 2025
176ff72
xmass: initial fix
sergforce May 27, 2025
653e625
xmass: fix sysref_gen routing
sergforce May 27, 2025
98f438c
refactoring
irodushka May 31, 2025
1f437b8
Fix potential error in lmk05318_get_output_divider() + new dsdr unit-…
irodushka Jun 2, 2025
407991e
fix in lmk solver, comparing int and double
irodushka Jun 2, 2025
a6c1081
xdsp test refactoring & cleaning
irodushka Jun 5, 2025
61ff3d2
xdsp test refactoring & cleaning
irodushka Jun 5, 2025
5067598
Startup fix
vd2org Jun 6, 2025
a697979
Merge branch 'feature_pe_sync_xmass' into feature_pe_sync
irodushka Jun 6, 2025
3af934c
fix build warnings (except 2)
irodushka Jun 6, 2025
db17c28
Add LMK05313 BAW settings for XO=52M
irodushka Jun 13, 2025
128a034
Fix LMK05313 BAW settings for XO=52M
irodushka Jun 13, 2025
d13f931
dsdr: fix lmk05318b usage for dsdr/hiper
sergforce Jun 14, 2025
d9067a2
usdr_flash: do not overwrite image with the same ID
sergforce Jun 14, 2025
ac88557
xsdr/ssdr: lml autocalibration wip
sergforce Jun 14, 2025
61ecff3
dsdr: wait tps6381x PG signal
sergforce Jun 16, 2025
68a2150
ssdr/xsdr: automatic MMCM RX calibration
sergforce Jun 16, 2025
ae856da
xsdr/ssdr: improve LML RX calibration speed
sergforce Jun 17, 2025
cc6fd74
Limiting unit-test: lmk05318 only, &lmk05318_customer_test1
irodushka Jun 20, 2025
c39d7cf
Updated build version from main.
vd2org Jun 26, 2025
993602f
update lms7002m lml control
sergforce Sep 18, 2025
e472f5c
xsdr: sync with new firmware
sergforce Sep 19, 2025
9f3bc43
fix build
sergforce Sep 19, 2025
d2a0f3d
xsdr: update rx calibration
sergforce Sep 22, 2025
52c22c4
xsdr
sergforce Sep 22, 2025
1c5474f
xsdr: lml cal
sergforce Sep 22, 2025
f16a756
xsdr lml cal
sergforce Sep 22, 2025
543aadb
xsdr lml
sergforce Sep 22, 2025
eea46d0
xsdr: oprimized for xsdr_r1_master_22092025_3_noiqp_nodiv_hstl_lpwr_h…
sergforce Sep 24, 2025
f29e24f
fix tests
sergforce Sep 26, 2025
6c86676
soapy: fix test SoapySDR application
sergforce Sep 26, 2025
ed96840
ssdr: sync with GW
sergforce Sep 30, 2025
df57e93
ssdr: add fe_4ch support
sergforce Oct 2, 2025
7fafc2c
add fe control
sergforce Oct 3, 2025
129f584
DIRTY FIX for external i2c control
sergforce Oct 3, 2025
55588ef
ssdr: fe dac control
sergforce Oct 9, 2025
a425609
dsdr: Rev2 external buffer control
sergforce Oct 9, 2025
e10f356
dsdr update
sergforce Oct 9, 2025
54cdfae
Added GPSDO test utility
dtv-comp Oct 9, 2025
169aaaf
usdr_flash add warning
sergforce Oct 10, 2025
e1eb4eb
pciefe add DAC control
sergforce Oct 11, 2025
cd841e6
Added external frequency parameter to GPSDO test utility
dtv-comp Oct 11, 2025
9498d39
ssdr: wait lms8 bring up
sergforce Oct 13, 2025
8d89f35
ssdr fix path
sergforce Oct 13, 2025
cd7ddd4
ssdr optimize PLL settings
sergforce Oct 13, 2025
1e65dd8
ssdr: full support of MPW2015/2024
sergforce Oct 13, 2025
d7d8c76
ssdr: update pll settings
sergforce Oct 13, 2025
072d4fa
dsdr: add afe7903 configuration
sergforce Oct 13, 2025
eeacb66
fix typo
sergforce Oct 14, 2025
a7eb593
fix typo
sergforce Oct 14, 2025
5ab5115
New yamls for usdr_registers.
vd2org Oct 15, 2025
77f3306
Add initial support of USDR_PRO
sergforce Oct 20, 2025
cb6150f
ssdr_pro: add device id in PCIe driver
sergforce Oct 21, 2025
b898f5c
hiper_r2: initial support
sergforce Oct 23, 2025
cad9714
Add avx512 simd xdsp convs for (c)i12 formats
irodushka Oct 28, 2025
c779f0a
Merge pull request #90 from wavelet-lab/feature_avx512_i12_funcs
irodushka Oct 28, 2025
6596915
Add ci16_6ci16 & ci16_cf32, generics & AVX2 + tests
irodushka Oct 28, 2025
8292f90
Refactoring for 6-way generics
irodushka Oct 28, 2025
c1d4857
dsdr: fix crash when liblibafe79xx wasn't provided
sergforce Oct 29, 2025
ffbe1b6
hiper add LMS8A_MPW2024 and LMS8B_MPW2024 enviroment to alter LMS8 st…
sergforce Oct 29, 2025
3421bc5
Add ci16_6 avx512 convs
irodushka Oct 29, 2025
d8104f0
dsdr_hiper: fix readback of expanders in HiperR2
sergforce Oct 30, 2025
84ad4db
Fixed yamls installation.
vd2org Oct 30, 2025
6ec27f2
try to optimize redundant transforms on i12-f32 convs
irodushka Oct 30, 2025
4d88a8a
conv_ci12_4cf32_generic: fix sigfault when the last byte of packet is…
sergforce Oct 30, 2025
be62e25
conv_ci12_4cf32_avx512bw: unwrap operation by default (4x)
sergforce Oct 30, 2025
9dd9a50
Merge branch 'feature_pe_sync' into feature_i12_f32_optimization
irodushka Oct 31, 2025
faf2306
Hyper v2 support.
vd2org Oct 31, 2025
066cd14
hiper_v2: add exp_v2 commands
sergforce Oct 31, 2025
f0182d7
ci12_4cf32 optimized (AVX2)
irodushka Oct 31, 2025
c68036f
ci12_2f32 & 4f32 optims for AVX512
irodushka Oct 31, 2025
47ad192
SA AVX512 code written (not tested)
irodushka Oct 31, 2025
63899b7
Merge pull request #92 from wavelet-lab/feature_i12_f32_optimization
sergforce Oct 31, 2025
bd56874
xdsp: add AVX512VBMI check
sergforce Oct 31, 2025
6379c3f
Merge pull request #93 from wavelet-lab/feature_sa_AVX512
sergforce Nov 1, 2025
eef5f60
Hyper v2 support.
vd2org Nov 3, 2025
05e406f
Merge remote-tracking branch 'origin/feature_pe_sync' into feature_pe…
vd2org Nov 3, 2025
40f0c07
Hyper v2 support: fixed swapped gpios.
vd2org Nov 3, 2025
006c4ac
usdr_pcie_uram: fix metadata overrun issue for >15 delayed events
sergforce Nov 5, 2025
7032dd9
usdr_pcie_uram: set RX DMA boundaries for the newest FPGA images
sergforce Nov 5, 2025
bdb4f2a
pcie_uram_main: verbose dma buffer information
sergforce Nov 5, 2025
95b6f53
ssdr: add dynamic layout for r1/r2
sergforce Nov 6, 2025
c5d8fd7
usb: add initialization of DMA limiter in RX chain for newest FPGA im…
sergforce Nov 6, 2025
1e96550
usdr_flash add internal verbosity flag for debugging
sergforce Nov 6, 2025
b48ef76
dsdr_hiper: fix bugs in control
sergforce Nov 6, 2025
824c4b4
lite refactoring & optimization
irodushka Nov 6, 2025
ab5e474
dsdr: fix configuration message
sergforce Nov 7, 2025
3313e21
hiper: turnoff IF LNA by default
sergforce Nov 7, 2025
10ba328
Hyper v2 support: fixed swapped gpios(2).
vd2org Nov 7, 2025
5db6c6f
fft_window_ci16_cf32_function added (g&avx2) + utest + minors
irodushka Nov 7, 2025
fd51884
add AVX512 funcs for fft windows & i16-f32
irodushka Nov 8, 2025
db39caf
hiper: fix RX band selection
sergforce Nov 18, 2025
906eb92
dsdr: fix AFETDD control through GPIO
sergforce Nov 18, 2025
449a28d
hiper: introduce LMS8_MPW2024_MASK to override default MPW configurat…
sergforce Nov 18, 2025
c3184ad
dsdr: do not delay in case of error
sergforce Nov 18, 2025
a5ad155
dsdr: refacotr AFE7950 default configuration name
sergforce Nov 18, 2025
7e5bb5d
lms8001: add more tweaks for MPW2024
sergforce Nov 18, 2025
bd7df6f
Fixed soapy driver (#96)
dtv-comp Nov 18, 2025
279ccf3
Merge pull request #94 from wavelet-lab/feature_simd_convs_for_SA_MT
sergforce Nov 21, 2025
d08447d
driver: add automatic features detect for entreprise-like kernels
sergforce Nov 25, 2025
85cba23
usdr_pcie_uram: properly detect backport kernel features in REHL-like…
sergforce Nov 27, 2025
694823f
xsdp: add generic ci16->8cf32 transformation
sergforce Dec 1, 2025
f1c64d4
xsdp: update CMakeLists.txt
sergforce Dec 2, 2025
250532a
Add ci16_8cf32 AVX2
irodushka Dec 7, 2025
cdc25e1
Add ci16_8ci16 AVX2
irodushka Dec 8, 2025
b35ce92
refactoring
irodushka Dec 8, 2025
30d50a7
sfe_rx_4: fix typo in number of maximum channel check
sergforce Dec 9, 2025
8f59837
usdr_channel_info_map_default: initialize channel list to invalid map…
sergforce Dec 9, 2025
0ab43ab
sfetrx4: add 8-ch dsp chain support
sergforce Dec 9, 2025
86f932a
dsdr_hiper: cache LMS8_LO PLL settings not to apply it twice succesfully
sergforce Dec 9, 2025
422e196
m2_dsdr: unify 4-ch/8-ch DSP chain support alog with HIPER FE LO update
sergforce Dec 9, 2025
cd22be7
fgearbox: add US DSP layout
sergforce Dec 9, 2025
6eda83f
add ci16->8ci16 to core transform function
irodushka Dec 9, 2025
65cbe35
Merge branch 'feature_pe_sync' into feature_xdsp_6ci16_convs
irodushka Dec 9, 2025
3256f4d
Merge pull request #98 from wavelet-lab/feature_ci16_8_convs
sergforce Dec 9, 2025
934c95f
Merge branch 'feature_pe_sync' into feature_xdsp_6ci16_convs
sergforce Dec 9, 2025
e5d2bc0
Merge pull request #91 from wavelet-lab/feature_xdsp_6ci16_convs
sergforce Dec 9, 2025
4e41402
dsdr: fix reporting default temperature
sergforce Dec 10, 2025
fa2e3ad
dsdr: fix samplerate reinitialization
sergforce Dec 10, 2025
7b492e7
dsdr: fix TX x32 interpolation, x64,x128,x256 is buggy (due to regres…
sergforce Dec 10, 2025
9c2ef45
xsdp: ci16->3cf32_2 generic
sergforce Dec 10, 2025
9d3068b
xdsp add 3->1 mux for ci16/cf32
sergforce Dec 10, 2025
8f1c3f5
streaming: add x3 channel count support
sergforce Dec 10, 2025
6e96777
xdsp: add x3 mux templates
sergforce Dec 10, 2025
d365db5
dsdr: remove old code
sergforce Dec 11, 2025
f2df45e
Fixed build in case when the root folder have uppercase letters.
vd2org Dec 11, 2025
7cd34fb
Merge remote-tracking branch 'origin/feature_pe_sync' into feature_pe…
vd2org Dec 11, 2025
b24d7de
Fixed soapy timestamp
dtv-comp Dec 15, 2025
42cbb05
Merge pull request #99 from wavelet-lab/fix_soapy_ts
sergforce Dec 15, 2025
ed8c967
afe79xx: add tdd call
sergforce Dec 16, 2025
7a0ba7a
sfe_rx_4: fix 3x channel mapper
sergforce Dec 16, 2025
b507e16
dsdr: introduce AFE_PROFILE
sergforce Dec 16, 2025
064f86b
fix dsdr
sergforce Dec 17, 2025
02a33f2
xsdp: add relative REF field to compare algos
sergforce Dec 19, 2025
f4acf00
sfe_erx: fix 3/6-way transormation
sergforce Dec 19, 2025
76b32b9
dsdr: refactor AFE profiles
sergforce Dec 19, 2025
8060875
Fixed usdr_registers startup script.
vd2org Jan 8, 2026
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion Taskfile.box.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ vars:
NOW:
sh: "date +%Y%m%d%H%m%S"
LABEL:
sh: "echo box-$(basename {{.ROOT_DIR}})"
sh: "echo box-$(basename {{.ROOT_DIR}} | tr '[:upper:]' '[:lower:]')"
DOCKER_FILE_PREFIX: "docker/Dockerfile.box"

tasks:
Expand Down
4 changes: 2 additions & 2 deletions packaging/debian-bookworm/changelog
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
usdr (0.9.9~bookworm0) stable; urgency=low
usdr (0.9.10b~bookworm0) stable; urgency=low

* Fixes and improvements

-- Ivan Kolesnikov <[email protected]> Sun, 30 Jan 2025 00:00:00 +0000
-- Ivan Kolesnikov <[email protected]> Thu, 26 Jun 2025 00:00:00 +0000
2 changes: 1 addition & 1 deletion packaging/debian-bookworm/control
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ Source: usdr
Section: misc
Priority: optional
Maintainer: Ivan Kolesnikov <[email protected]>
Standards-Version: 0.9.9
Standards-Version: 0.9.10b
Homepage: https://github.com/wavelet-lab/usdr-lib
Vcs-Browser: https://github.com/wavelet-lab/usdr-lib
Vcs-Git: https://github.com/wavelet-lab/usdr-lib.git
Expand Down
4 changes: 2 additions & 2 deletions packaging/ubuntu-bionic/changelog
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
usdr (0.9.9~bionic0) bionic; urgency=low
usdr (0.9.10b~bionic0) bionic; urgency=low

* Fixes and improvements

-- Ivan Kolesnikov <[email protected]> Sun, 30 Jan 2025 00:00:00 +0000
-- Ivan Kolesnikov <[email protected]> Thu, 26 Jun 2025 00:00:00 +0000
2 changes: 1 addition & 1 deletion packaging/ubuntu-bionic/control
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ Source: usdr
Section: misc
Priority: optional
Maintainer: Ivan Kolesnikov <[email protected]>
Standards-Version: 0.9.9
Standards-Version: 0.9.10b
Homepage: https://github.com/wavelet-lab/usdr-lib
Vcs-Browser: https://github.com/wavelet-lab/usdr-lib
Vcs-Git: https://github.com/wavelet-lab/usdr-lib.git
Expand Down
4 changes: 2 additions & 2 deletions packaging/ubuntu-focal/changelog
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
usdr (0.9.9~focal0) focal; urgency=low
usdr (0.9.10b~focal0) focal; urgency=low

* Fixes and improvements

-- Ivan Kolesnikov <[email protected]> Sun, 30 Jan 2025 00:00:00 +0000
-- Ivan Kolesnikov <[email protected]> Thu, 26 Jun 2025 00:00:00 +0000
2 changes: 1 addition & 1 deletion packaging/ubuntu-focal/control
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ Source: usdr
Section: misc
Priority: optional
Maintainer: Ivan Kolesnikov <[email protected]>
Standards-Version: 0.9.9
Standards-Version: 0.9.10b
Homepage: https://github.com/wavelet-lab/usdr-lib
Vcs-Browser: https://github.com/wavelet-lab/usdr-lib
Vcs-Git: https://github.com/wavelet-lab/usdr-lib.git
Expand Down
4 changes: 2 additions & 2 deletions packaging/ubuntu-jammy/changelog
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
usdr (0.9.9~jammy0) jammy; urgency=low
usdr (0.9.10b~jammy0) jammy; urgency=low

* Fixes and improvements

-- Ivan Kolesnikov <[email protected]> Sun, 30 Jan 2025 00:00:00 +0000
-- Ivan Kolesnikov <[email protected]> Thu, 26 Jun 2025 00:00:00 +0000
2 changes: 1 addition & 1 deletion packaging/ubuntu-jammy/control
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ Source: usdr
Section: misc
Priority: optional
Maintainer: Ivan Kolesnikov <[email protected]>
Standards-Version: 0.9.9
Standards-Version: 0.9.10b
Homepage: https://github.com/wavelet-lab/usdr-lib
Vcs-Browser: https://github.com/wavelet-lab/usdr-lib
Vcs-Git: https://github.com/wavelet-lab/usdr-lib.git
Expand Down
4 changes: 2 additions & 2 deletions packaging/ubuntu-noble/changelog
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
usdr (0.9.9~noble0) noble; urgency=low
usdr (0.9.10b~noble0) noble; urgency=low

* Fixes and improvements

-- Ivan Kolesnikov <[email protected]> Sun, 30 Jan 2025 00:00:00 +0000
-- Ivan Kolesnikov <[email protected]> Thu, 26 Jun 2025 00:00:00 +0000
2 changes: 1 addition & 1 deletion packaging/ubuntu-noble/control
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ Source: usdr
Section: misc
Priority: optional
Maintainer: Ivan Kolesnikov <[email protected]>
Standards-Version: 0.9.9
Standards-Version: 0.9.10b
Homepage: https://github.com/wavelet-lab/usdr-lib
Vcs-Browser: https://github.com/wavelet-lab/usdr-lib
Vcs-Git: https://github.com/wavelet-lab/usdr-lib.git
Expand Down
5 changes: 5 additions & 0 deletions src/Changelog.txt
Original file line number Diff line number Diff line change
@@ -1,3 +1,8 @@
Release 0.9.10b (2025-06-26)
==========================

- Fixes and improvements

Release 0.9.9 (2025-01-30)
==========================

Expand Down
2 changes: 1 addition & 1 deletion src/dmonitor/usdr_registers
Original file line number Diff line number Diff line change
@@ -1,3 +1,3 @@
#!/usr/bin/env sh

exec /usr/bin/env python3 /usr/libexec/usdr_dmonitor/registers_widget.py
exec /usr/bin/env python3 /usr/libexec/usdr_dmonitor/registers_widget.py "$@"
1 change: 1 addition & 0 deletions src/dmonitor/yamls/ext_fe_ch4_400_7200_e.yaml
1 change: 1 addition & 0 deletions src/dmonitor/yamls/ext_fe_ch4_400_7200_usr.yaml
78 changes: 47 additions & 31 deletions src/hwparser/gen_h.py
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ def __init__(self, parser: reg_parser.ParserTop, filename: str) -> None:
self.o_name = str(os.path.splitext(os.path.basename(filename))[0])
self.l_name = self.o_name.lower()
self.h_name = self.o_name.upper()

self.parser = parser
self.addr_width = parser.addr_width
self.data_width = parser.data_width
Expand All @@ -26,7 +26,7 @@ def __init__(self, parser: reg_parser.ParserTop, filename: str) -> None:
self.page_prefix = parser.page_prefix
self.reg_prefix = "%s_" % parser.reg_prefix.upper() if len(parser.reg_prefix) > 0 else ''

self.field_prefix_ar = [ a.lower() for a in parser.field_prefix_ar ]
self.field_prefix_ar = [a.lower() for a in parser.field_prefix_ar]

# Flat all pages
self.regs = {}
Expand All @@ -36,8 +36,8 @@ def __init__(self, parser: reg_parser.ParserTop, filename: str) -> None:
name = "%s_%s" % (pname, r.name) if self.page_prefix else r.name

if name in self.regs.keys():
raise(Exception("Rigester `%s` is already in flat map! Rename it" % name))
raise (Exception("Rigester `%s` is already in flat map! Rename it" % name))

# TODO: parse ucnt
if r.ucnt == 1:
self.regs[name] = r.addr
Expand All @@ -48,14 +48,12 @@ def __init__(self, parser: reg_parser.ParserTop, filename: str) -> None:
for k in range(r.ucnt):
self.regs[name + "_BY%d" % (r.ucnt - k - 1)] = r.addr_l + k


def regName(self, reg: reg_parser.ParserRegs) -> str:
if self.page_prefix:
return "%s_%s" % (reg.page.name.upper(), reg.name)

return reg.name


def fieldName(self, field: reg_parser.ParserFields) -> str:
pfx = []
for i in self.field_prefix_ar:
Expand All @@ -66,24 +64,30 @@ def fieldName(self, field: reg_parser.ParserFields) -> str:
elif i == "regaddr":
pfx.append("%02x" % field.reg.addr_l)
else:
raise(Exception("Unknown prefix type '%s'" % i))
raise (Exception("Unknown prefix type '%s'" % i))

if len(pfx) > 0:
pfx.append(field.name)
return reduce(lambda x, y: "%s_%s" % (x, y), pfx)

return field.name


def normalize(self, name: str) -> str:
return (name.replace('-', '_')
.replace('.', '_')
.replace(',', '_')
.replace(' ', '_')
.replace('(', '')
.replace('|', 'OR')
.replace(')', '')
.replace('/', 'DIV'))
.replace('<=', 'LE')
.replace('>=', 'GE')
.replace('>', 'GT')
.replace('<', 'LT')
.replace('=', 'EQ')
.replace('+', 'PL')
.replace("'", 'MARK')
.replace('.', '_')
.replace(',', '_')
.replace(' ', '_')
.replace('(', '')
.replace('|', 'OR')
.replace(')', '')
.replace('/', 'DIV'))

def ser_ch_fenum(self, reg: reg_parser.ParserRegs, name: str) -> str:
vt = False
Expand All @@ -96,7 +100,7 @@ def ser_ch_fenum(self, reg: reg_parser.ParserRegs, name: str) -> str:
str += "};"
if vt and len(reg.fields) == 1:
return ""

return str

def generate_setter_expression(self, f, custom_name) -> str:
Expand Down Expand Up @@ -165,13 +169,13 @@ def ser_ch_enum(self, name: str, en_dict: dict, prefix: str = "") -> str:
str = "enum %s_t {\n" % name
for i, v in en_dict.items():
str += "%s%s%s = 0x%x,\n" % (GenH.TAB, prefix, i.replace('-', '_')
.replace('.', '_')
.replace(',', '_')
.replace(' ', '_')
.replace('(', '')
.replace('|', 'OR')
.replace(')', '')
.replace('/', 'DIV'), v)
.replace('.', '_')
.replace(',', '_')
.replace(' ', '_')
.replace('(', '')
.replace('|', 'OR')
.replace(')', '')
.replace('/', 'DIV'), v)
str += "};"
return str

Expand All @@ -181,11 +185,19 @@ def write_ch(self, filename):
print(all_regs)

# Make register define
if (self.parser.wr_mask is not None) and (self.parser.rd_mask is not None):
raise (Exception("You should specify rd_mask OR wr_mask, but not both!"))

def_macro = "MAKE_%s_REG_WR" % self.h_name
def_wr_msk = "0x%x | " % self.parser.wr_mask if self.parser.wr_mask is not None else ""
def_wr = "#define %s(a, v) (%s((a) << %d) | ((v) & 0x%x))" % (def_macro, def_wr_msk, self.data_width, (1 << self.data_width) - 1)
print(def_wr)

def_macro_rd = "MAKE_%s_REG_RD" % self.h_name
def_rd_msk = "0x%x | " % self.parser.rd_mask if self.parser.rd_mask is not None else ""
def_rd = "#define %s(a) (%s((a) << %d))" % (def_macro_rd, def_rd_msk, self.data_width)
print(def_rd)

# Predefined universal enums
for e in self.enums:
em = e.replace('-', '_')
Expand Down Expand Up @@ -213,10 +225,12 @@ def write_ch(self, filename):
print(self.ser_cf_fmacro(r))

if r.ucnt == 1:
defc = "#define MAKE_%s_%s(%s)" % (self.h_name, name, reduce(lambda x, y: "%s, %s" % (x, y), [x.name.lower() for x in r.fields]))
#defc += " ((%s << %d) |" % (name, self.data_width)
defc = "#define MAKE_%s_%s(%s)" % (
self.h_name, name, reduce(lambda x, y: "%s, %s" % (x, y), [x.name.lower() for x in r.fields]))
# defc += " ((%s << %d) |" % (name, self.data_width)
defc += " %s(%s," % (def_macro, name)
defc += reduce(lambda x, y: "%s | %s" % (x, y), [" \\\n%s%s" % (self.TAB, self.generate_setter_expression(x, x.name.lower())) for x in r.fields ])
defc += reduce(lambda x, y: "%s | %s" % (x, y),
[" \\\n%s%s" % (self.TAB, self.generate_setter_expression(x, x.name.lower())) for x in r.fields])
defc += ")"
print(defc)
else:
Expand All @@ -228,8 +242,10 @@ def write_ch(self, filename):
value_msk = reduce(lambda x, y: x | y, [x.mask for x in r.fields])
value_off = reduce(lambda x, y: min(x, y), [x.bits_l for x in r.fields])
if len(r.fields) > 1:
defc = "#define MAKE_%s_%s_LONG(%s) (" % (self.h_name, name, reduce(lambda x, y: "%s, %s" % (x, y), [x.name.lower() for x in r.fields]))
defc += reduce(lambda x, y: "%s | %s" % (x, y), [" \\\n%s%s" % (self.TAB, self.generate_setter_expression(x, x.name.lower())) for x in r.fields ])
defc = "#define MAKE_%s_%s_LONG(%s) (" % (
self.h_name, name, reduce(lambda x, y: "%s, %s" % (x, y), [x.name.lower() for x in r.fields]))
defc += reduce(lambda x, y: "%s | %s" % (x, y),
[" \\\n%s%s" % (self.TAB, self.generate_setter_expression(x, x.name.lower())) for x in r.fields])
defc += ")"
print(defc)

Expand All @@ -247,9 +263,9 @@ def write_ch(self, filename):
else:
# defc += " ((%s_BY%d << %d) | (((value) << %d) & 0x%x))" % (name, u, self.data_width, -by_off, by_msk)
defc += " (((value) << %d) & 0x%x))" % (-by_off, by_msk)
print(defc)
print(defc)

# if 'c-cache' in self.parser.raw_yaml:
# if 'c-cache' in self.parser.raw_yaml:
# cc = self.parser.raw_yaml['c-cache']
# if 'regs' in cc:
# print("\n\n/* Cached operations */")
Expand Down Expand Up @@ -284,10 +300,10 @@ def parse_c_cache(self, cregs):
fn += "p->%s = (p->%s & ~%s_MSK) | ((%s << %s_OFF) & %s_MSK); }" % (regn, regn, FLDN, fname, FLDN, FLDN)
print(fn)


def write_vh(self, filename):
pass


if __name__ == '__main__':
parser = argparse.ArgumentParser(description='Debug UI options')
parser.add_argument('--yaml', dest='yaml', type=str,
Expand Down
43 changes: 43 additions & 0 deletions src/lib/cal/opt_func.c
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
#include "opt_func.h"
#include <limits.h>
#include <usdr_logging.h>
#include <stdio.h>

int find_golden_min(int start, int stop, void* param, evaluate_fn_t fn, int* px, int* pv, int exparam)
{
Expand Down Expand Up @@ -170,3 +171,45 @@ int find_best_2d(struct opt_iteration2d *ops, unsigned max_count, void* param, i
return 0;
}

// Function to implement Stein's Algorithm
// Borrowed from: https://www.geeksforgeeks.org/steins-algorithm-for-finding-gcd/ (C)
//
uint64_t find_gcd(uint64_t a, uint64_t b)
{
if (a == b)
return a;

// GCD(0, b) == b; GCD(a, 0) == a,
// GCD(0, 0) == 0
if (a == 0)
return b;
if (b == 0)
return a;

// look for factors of 2
if (~a & 1) // a is even
{
if (b & 1) // b is odd
return find_gcd(a >> 1, b);
else // both a and b are even
return find_gcd(a >> 1, b >> 1) << 1;
}

if (~b & 1) // a is odd, b is even
return find_gcd(a, b >> 1);

// reduce larger number
if (a > b)
return find_gcd((a - b) >> 1, b);

return find_gcd((b - a) >> 1, a);
}

void binary_print_u32(uint32_t x, char* s, bool reverse)
{
unsigned len = 0;
for(unsigned i = 0; i < sizeof(x) * 8; ++i)
{
len += sprintf(s + len, "%1u", reverse ? (x >> i) & 0x1 : (int32_t)(x << i) < 0);
}
}
12 changes: 12 additions & 0 deletions src/lib/cal/opt_func.h
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,9 @@
#ifndef OPT_FUNC_H
#define OPT_FUNC_H

#include "stdint.h"
#include "stdbool.h"
#include "time.h"

#define MAX(a, b) \
({ __typeof__ (a) _a = (a); \
Expand Down Expand Up @@ -55,5 +58,14 @@ struct opt_iteration2d
int find_best_2d(struct opt_iteration2d *ops, unsigned max_count, void* param, int stop_when,
int *px, int *py, int *pfxy);

uint64_t find_gcd(uint64_t a, uint64_t b);
void binary_print_u32(uint32_t x, char* s, bool reverse);

static inline uint64_t clock_get_time()
{
struct timespec ts;
clock_gettime(CLOCK_REALTIME, &ts);
return (uint64_t)ts.tv_sec * 1000000LL + (uint64_t)ts.tv_nsec/1000LL;
}

#endif
4 changes: 2 additions & 2 deletions src/lib/common/ring_buffer.c
Original file line number Diff line number Diff line change
Expand Up @@ -92,7 +92,7 @@ unsigned ring_buffer_pwait(struct ring_buffer* rb, int usecs)

void ring_buffer_ppost(struct ring_buffer* rb)
{
int res = sem_post(&rb->consumer);
__attribute__((unused)) int res = sem_post(&rb->consumer);
assert(res == 0);
}

Expand All @@ -110,7 +110,7 @@ unsigned ring_buffer_cwait(struct ring_buffer* rb, int usecs)

void ring_buffer_cpost(struct ring_buffer* rb)
{
int res = sem_post(&rb->producer);
__attribute__((unused)) int res = sem_post(&rb->producer);
assert(res == 0);
}

Expand Down
Loading