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AlexLanzanoAlexLanzano
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Update stm32f4 hal to use config options to setup clock and uart
Modifies the stm32f4 hal to use the new config options to configure the PLL clock. This also modifies the stm32f4 uart driver to allow the user to specify which uart they want to use via the config option.
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2 files changed

+84
-54
lines changed

2 files changed

+84
-54
lines changed

‎hal/stm32f4.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -261,11 +261,11 @@ static void clock_pll_on(int powersave)
261261
APB1_CLOCK_ER |= PWR_APB1_CLOCK_ER_VAL;
262262

263263
/* Select clock parameters (CPU Speed = 168MHz) */
264-
cpu_freq = 168000000; (void)cpu_freq; /* not used */
265-
pllm = 8;
266-
plln = 336;
267-
pllp = 2;
268-
pllq = 7;
264+
cpu_freq = CLOCK_SPEED; (void)cpu_freq; /* not used */
265+
pllm = STM32_PLLM;
266+
plln = STM32_PLLN;
267+
pllp = STM32_PLLP;
268+
pllq = STM32_PLLQ;
269269
pllr = 0; (void)pllr; /* not used */
270270
hpre = RCC_PRESCALER_DIV_NONE;
271271
ppre1 = RCC_PRESCALER_DIV_4;

‎hal/uart/uart_drv_stm32f4.c‎

Lines changed: 79 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -29,18 +29,11 @@
2929

3030
#include <stdint.h>
3131

32-
/* Driver hardcoded to work on UART3 (PD8/PD9) */
33-
#define UART3 (0x40004800)
34-
#define UART3_PIN_AF 7
35-
#define UART3_RX_PIN 9
36-
#define UART3_TX_PIN 8
37-
38-
#define UART3_SR (*(volatile uint32_t *)(UART3))
39-
#define UART3_DR (*(volatile uint32_t *)(UART3 + 0x04))
40-
#define UART3_BRR (*(volatile uint32_t *)(UART3 + 0x08))
41-
#define UART3_CR1 (*(volatile uint32_t *)(UART3 + 0x0c))
42-
#define UART3_CR2 (*(volatile uint32_t *)(UART3 + 0x10))
43-
32+
/* Common UART Config */
33+
#if !defined(USE_UART1) && !defined(USE_UART3)
34+
#define USE_UART3
35+
#endif
36+
#define UART_PIN_AF 7
4437
#define UART_CR1_UART_ENABLE (1 << 13)
4538
#define UART_CR1_SYMBOL_LEN (1 << 12)
4639
#define UART_CR1_PARITY_ENABLED (1 << 10)
@@ -51,52 +44,89 @@
5144
#define UART_SR_TX_EMPTY (1 << 7)
5245
#define UART_SR_RX_NOTEMPTY (1 << 5)
5346

54-
47+
#ifndef CLOCK_SPEED
5548
#define CLOCK_SPEED (168000000)
49+
#endif
50+
51+
/* Common GPIO Config */
52+
#define GPIO_MODE_AF (2)
5653

57-
#define APB1_CLOCK_ER (*(volatile uint32_t *)(0x40023840))
58-
#define UART3_APB1_CLOCK_ER_VAL (1 << 18)
54+
/* UART1 Config */
55+
#ifdef USE_UART1
56+
#define UART_RX_PIN 7
57+
#define UART_TX_PIN 6
58+
59+
#define UART1 (0x40011000)
60+
#define UART_SR (*(volatile uint32_t *)(UART1))
61+
#define UART_DR (*(volatile uint32_t *)(UART1 + 0x04))
62+
#define UART_BRR (*(volatile uint32_t *)(UART1 + 0x08))
63+
#define UART_CR1 (*(volatile uint32_t *)(UART1 + 0x0c))
64+
#define UART_CR2 (*(volatile uint32_t *)(UART1 + 0x10))
65+
66+
#define UART_CLOCK_ER (*(volatile uint32_t *)(0x40023844))
67+
#define UART_CLOCK_ER_VAL (1 << 4)
68+
69+
#define GPIO_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
70+
#define GPIO_CLOCK_ER_VAL (1 << 1)
71+
#define GPIOB_BASE 0x40020400
72+
#define GPIO_MODE (*(volatile uint32_t *)(GPIOB_BASE + 0x00))
73+
#define GPIO_AF (*(volatile uint32_t *)(GPIOB_BASE + 0x20))
74+
#endif
75+
76+
/* UART3 Config */
77+
#ifdef USE_UART3
78+
#define UART_RX_PIN 9
79+
#define UART_TX_PIN 8
5980

60-
#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
61-
#define GPIOD_AHB1_CLOCK_ER (1 << 3)
81+
#define UART3 (0x40004800)
82+
#define UART_SR (*(volatile uint32_t *)(UART3))
83+
#define UART_DR (*(volatile uint32_t *)(UART3 + 0x04))
84+
#define UART_BRR (*(volatile uint32_t *)(UART3 + 0x08))
85+
#define UART_CR1 (*(volatile uint32_t *)(UART3 + 0x0c))
86+
#define UART_CR2 (*(volatile uint32_t *)(UART3 + 0x10))
87+
88+
#define UART_CLOCK_ER (*(volatile uint32_t *)(0x40023840))
89+
#define UART_CLOCK_ER_VAL (1 << 18)
90+
91+
#define GPIO_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
92+
#define GPIO_CLOCK_ER_VAL (1 << 3)
6293
#define GPIOD_BASE 0x40020c00
63-
#define GPIOD_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
64-
#define GPIOD_AFL (*(volatile uint32_t *)(GPIOD_BASE + 0x20))
65-
#define GPIOD_AFH (*(volatile uint32_t *)(GPIOD_BASE + 0x24))
66-
#define GPIO_MODE_AF (2)
94+
#define GPIO_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
95+
#define GPIO_AF (*(volatile uint32_t *)(GPIOD_BASE + 0x20))
96+
#endif
97+
6798

6899
static void uart_pins_setup(void)
69100
{
70101
uint32_t reg;
71-
AHB1_CLOCK_ER |= GPIOD_AHB1_CLOCK_ER;
102+
GPIO_CLOCK_ER |= GPIO_CLOCK_ER_VAL;
72103
/* Set mode = AF */
73-
reg = GPIOD_MODE & ~ (0x03 << (UART3_RX_PIN * 2));
74-
GPIOD_MODE = reg | (2 << (UART3_RX_PIN * 2));
75-
reg = GPIOD_MODE & ~ (0x03 << (UART3_TX_PIN * 2));
76-
GPIOD_MODE = reg | (2 << (UART3_TX_PIN * 2));
77-
78-
/* Alternate function: use high pins (8 and 9) */
79-
reg = GPIOD_AFH & ~(0xf << ((UART3_TX_PIN - 8) * 4));
80-
GPIOD_AFH = reg | (UART3_PIN_AF << ((UART3_TX_PIN - 8) * 4));
81-
reg = GPIOD_AFH & ~(0xf << ((UART3_RX_PIN - 8) * 4));
82-
GPIOD_AFH = reg | (UART3_PIN_AF << ((UART3_RX_PIN - 8) * 4));
104+
reg = GPIO_MODE & ~ (0x03 << (UART_RX_PIN * 2));
105+
GPIO_MODE = reg | (2 << (UART_RX_PIN * 2));
106+
reg = GPIO_MODE & ~ (0x03 << (UART_TX_PIN * 2));
107+
GPIO_MODE = reg | (2 << (UART_TX_PIN * 2));
108+
109+
reg = GPIO_AF & ~(0xf << (UART_TX_PIN * 4));
110+
GPIO_AF = reg | (UART_PIN_AF << (UART_TX_PIN * 4));
111+
reg = GPIO_AF & ~(0xf << (UART_RX_PIN * 4));
112+
GPIO_AF = reg | (UART_PIN_AF << (UART_RX_PIN * 4));
83113
}
84114

85115
int uart_tx(const uint8_t c)
86116
{
87117
uint32_t reg;
88118
do {
89-
reg = UART3_SR;
119+
reg = UART_SR;
90120
} while ((reg & UART_SR_TX_EMPTY) == 0);
91-
UART3_DR = c;
121+
UART_DR = c;
92122
return 1;
93123
}
94124

95125
int uart_rx(uint8_t *c)
96126
{
97-
volatile uint32_t reg = UART3_SR;
127+
volatile uint32_t reg = UART_SR;
98128
if ((reg & UART_SR_RX_NOTEMPTY) != 0) {
99-
reg = UART3_DR;
129+
reg = UART_DR;
100130
*c = (uint8_t)(reg & 0xff);
101131
return 1;
102132
}
@@ -109,42 +139,42 @@ int uart_init(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
109139
/* Enable pins and configure for AF7 */
110140
uart_pins_setup();
111141
/* Turn on the device */
112-
APB1_CLOCK_ER |= UART3_APB1_CLOCK_ER_VAL;
113-
UART3_CR1 &= ~(UART_CR1_UART_ENABLE);
142+
UART_CLOCK_ER |= UART_CLOCK_ER_VAL;
143+
UART_CR1 &= ~(UART_CR1_UART_ENABLE);
114144

115145
/* Configure for TX + RX */
116-
UART3_CR1 |= (UART_CR1_TX_ENABLE | UART_CR1_RX_ENABLE);
146+
UART_CR1 |= (UART_CR1_TX_ENABLE | UART_CR1_RX_ENABLE);
117147

118148
/* Configure clock */
119-
UART3_BRR = CLOCK_SPEED / bitrate;
149+
UART_BRR = CLOCK_SPEED / bitrate;
120150

121151
/* Configure data bits */
122152
if (data == 8)
123-
UART3_CR1 &= ~UART_CR1_SYMBOL_LEN;
153+
UART_CR1 &= ~UART_CR1_SYMBOL_LEN;
124154
else
125-
UART3_CR1 |= UART_CR1_SYMBOL_LEN;
155+
UART_CR1 |= UART_CR1_SYMBOL_LEN;
126156

127157
/* Configure parity */
128158
switch (parity) {
129159
case 'O':
130-
UART3_CR1 |= UART_CR1_PARITY_ODD;
160+
UART_CR1 |= UART_CR1_PARITY_ODD;
131161
/* fall through to enable parity */
132162
/* FALL THROUGH */
133163
case 'E':
134-
UART3_CR1 |= UART_CR1_PARITY_ENABLED;
164+
UART_CR1 |= UART_CR1_PARITY_ENABLED;
135165
break;
136166
default:
137-
UART3_CR1 &= ~(UART_CR1_PARITY_ENABLED | UART_CR1_PARITY_ODD);
167+
UART_CR1 &= ~(UART_CR1_PARITY_ENABLED | UART_CR1_PARITY_ODD);
138168
}
139169
/* Set stop bits */
140-
reg = UART3_CR2 & ~UART_CR2_STOPBITS;
170+
reg = UART_CR2 & ~UART_CR2_STOPBITS;
141171
if (stop > 1)
142-
UART3_CR2 = reg & (2 << 12);
172+
UART_CR2 = reg & (2 << 12);
143173
else
144-
UART3_CR2 = reg;
174+
UART_CR2 = reg;
145175

146176
/* Turn on uart */
147-
UART3_CR1 |= UART_CR1_UART_ENABLE;
177+
UART_CR1 |= UART_CR1_UART_ENABLE;
148178
return 0;
149179
}
150180

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