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PPC32 ASM: alternative C code with registers prepended #9603

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Merged
dgarske merged 1 commit into from
Jan 7, 2026
+7,694 −1
Merged

PPC32 ASM: alternative C code with registers prepended #9603

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10 changes: 9 additions & 1 deletion configure.ac
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Original file line number Diff line number Diff line change
Expand Up @@ -3721,6 +3721,9 @@ then
inline)
ENABLED_PPC32_ASM_INLINE=yes
;;
inline-reg)
ENABLED_PPC32_ASM_INLINE_REG=yes
;;
small)
ENABLED_PPC32_ASM_SMALL=yes
;;
Expand All @@ -3738,7 +3741,7 @@ then
AC_MSG_NOTICE([32-bit PowerPC assembly for SHA-256])
ENABLED_PPC32_ASM=yes
fi
if test "$ENABLED_PPC32_ASM_INLINE" = "yes"; then
if test "$ENABLED_PPC32_ASM_INLINE" = "yes" || test "$ENABLED_PPC32_ASM_INLINE_REG" = "yes"; then
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_PPC32_ASM_INLINE"
else
AM_CCASFLAGS="$AM_CCASFLAGS -DWOLFSSL_PPC32_ASM"
Expand Down Expand Up @@ -11006,6 +11009,7 @@ AM_CONDITIONAL([BUILD_ARM_64],[test "$ENABLED_ARM_64" = "yes" || test "$ENABLED
AM_CONDITIONAL([BUILD_RISCV_ASM],[test "x$ENABLED_RISCV_ASM" = "xyes"])
AM_CONDITIONAL([BUILD_PPC32_ASM],[test "x$ENABLED_PPC32_ASM" = "xyes"])
AM_CONDITIONAL([BUILD_PPC32_ASM_INLINE],[test "x$ENABLED_PPC32_ASM_INLINE" = "xyes"])
AM_CONDITIONAL([BUILD_PPC32_ASM_INLINE_REG],[test "x$ENABLED_PPC32_ASM_INLINE_REG" = "xyes"])
AM_CONDITIONAL([BUILD_XILINX],[test "x$ENABLED_XILINX" = "xyes"])
AM_CONDITIONAL([BUILD_AESNI],[test "x$ENABLED_AESNI" = "xyes"])
AM_CONDITIONAL([BUILD_INTELASM],[test "x$ENABLED_INTELASM" = "xyes"])
Expand Down Expand Up @@ -11677,6 +11681,10 @@ if test "$ENABLED_PPC32_ASM_INLINE" = "yes"
then
ENABLED_PPC32_ASM="inline C"
fi
if test "$ENABLED_PPC32_ASM_INLINE_REG" = "yes"
then
ENABLED_PPC32_ASM="inline C Reg"
fi
echo " * PPC32 ASM $ENABLED_PPC32_ASM"
echo " * Write duplicate: $ENABLED_WRITEDUP"
echo " * Xilinx Hardware Acc.: $ENABLED_XILINX"
Expand Down
12 changes: 12 additions & 0 deletions src/include.am
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Original file line number Diff line number Diff line change
Expand Up @@ -304,7 +304,11 @@ if BUILD_PPC32_ASM
if BUILD_PPC32_ASM_INLINE
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm_c.c
else
if BUILD_PPC32_ASM_INLINE_REG
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm_cr.c
else
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm.S
endif !BUILD_PPC32_ASM_INLINE_REG
endif !BUILD_PPC32_ASM_INLINE
endif BUILD_PPC32_ASM

Expand Down Expand Up @@ -539,7 +543,11 @@ if BUILD_PPC32_ASM
if BUILD_PPC32_ASM_INLINE
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm_c.c
else
if BUILD_PPC32_ASM_INLINE_REG
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm_cr.c
else
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm.S
endif !BUILD_PPC32_ASM_INLINE_REG
endif !BUILD_PPC32_ASM_INLINE
endif BUILD_PPC32_ASM

Expand Down Expand Up @@ -830,7 +838,11 @@ if BUILD_PPC32_ASM
if BUILD_PPC32_ASM_INLINE
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm_c.c
else
if BUILD_PPC32_ASM_INLINE_REG
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm_cr.c
else
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/ppc32/ppc32-sha256-asm.S
endif !BUILD_PPC32_ASM_INLINE_REG
endif !BUILD_PPC32_ASM_INLINE
endif BUILD_PPC32_ASM

Expand Down
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