@@ -1142,36 +1142,17 @@ namespace xsimd
11421142 }
11431143
11441144 // swizzle (constant mask)
1145- template <
1146- class A , typename T,
1147- uint8_t V0, uint8_t V1, uint8_t V2, uint8_t V3, uint8_t V4, uint8_t V5, uint8_t V6, uint8_t V7,
1148- uint8_t V8, uint8_t V9, uint8_t V10, uint8_t V11, uint8_t V12, uint8_t V13, uint8_t V14, uint8_t V15,
1149- uint8_t V16, uint8_t V17, uint8_t V18, uint8_t V19, uint8_t V20, uint8_t V21, uint8_t V22, uint8_t V23,
1150- uint8_t V24, uint8_t V25, uint8_t V26, uint8_t V27, uint8_t V28, uint8_t V29, uint8_t V30, uint8_t V31,
1151- detail::enable_sized_t <T, 1 > = 0 >
1152- XSIMD_INLINE batch<T, A> swizzle (
1153- batch<T, A> const & self,
1154- batch_constant<
1155- uint8_t , A,
1156- V0, V1, V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13, V14, V15,
1157- V16, V17, V18, V19, V20, V21, V22, V23, V24, V25, V26, V27, V28, V29, V30, V31>
1158- mask,
1159- requires_arch<avx2> req) noexcept
1145+ template <class A , typename T, uint8_t ... Vals, detail::enable_sized_t <T, 1 > = 0 >
1146+ XSIMD_INLINE batch<T, A> swizzle (batch<T, A> const & self, batch_constant<uint8_t , A, Vals...> mask, requires_arch<avx2> req) noexcept
11601147 {
1148+ static_assert (sizeof ...(Vals) == 32 , " Must contain as many uint8_t as can fit in avx register" );
11611149 return swizzle (self, mask.as_batch (), req);
11621150 }
11631151
1164- template <
1165- class A , typename T,
1166- uint16_t V0, uint16_t V1, uint16_t V2, uint16_t V3, uint16_t V4, uint16_t V5, uint16_t V6, uint16_t V7,
1167- uint16_t V8, uint16_t V9, uint16_t V10, uint16_t V11, uint16_t V12, uint16_t V13, uint16_t V14, uint16_t V15,
1168- detail::enable_sized_t <T, 2 > = 0 >
1169- XSIMD_INLINE batch<T, A> swizzle (
1170- batch<T, A> const & self,
1171- batch_constant<uint16_t , A, V0, V1, V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13, V14, V15>
1172- mask,
1173- requires_arch<avx2> req) noexcept
1152+ template <class A , typename T, uint16_t ... Vals, detail::enable_sized_t <T, 2 > = 0 >
1153+ XSIMD_INLINE batch<T, A> swizzle (batch<T, A> const & self, batch_constant<uint16_t , A, Vals...> mask, requires_arch<avx2> req) noexcept
11741154 {
1155+ static_assert (sizeof ...(Vals) == 16 , " Must contain as many uint16_t as can fit in avx register" );
11751156 return swizzle (self, mask.as_batch (), req);
11761157 }
11771158
0 commit comments