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Add missing batch cast from rvv types #1080

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Add missing batch cast from rvv types #1080

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68cd020
Add missing batch cast from rvv types
serge-sans-paille Jan 15, 2025
3015bbd
WIP
serge-sans-paille Jan 15, 2025
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40 changes: 40 additions & 0 deletions include/xsimd/types/xsimd_rvv_register.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -143,6 +143,27 @@ namespace xsimd
return __riscv_vreinterpret_i8m1(x);
}
template <>
XSIMD_INLINE rvv_type_info<int16_t, rvv_width_m1 * 1>::type
rvv_type_info<int16_t, rvv_width_m1 * 1>::bitcast<__rvv_uint8m1_t>(
__rvv_uint8m1_t x) noexcept
{
return __riscv_vreinterpret_i16m1(__riscv_vreinterpret_u16m1(x));
}
template <>
XSIMD_INLINE rvv_type_info<int32_t, rvv_width_m1 * 1>::type
rvv_type_info<int32_t, rvv_width_m1 * 1>::bitcast<__rvv_uint8m1_t>(
__rvv_uint8m1_t x) noexcept
{
return __riscv_vreinterpret_i32m1(__riscv_vreinterpret_u32m1(x));
}
template <>
XSIMD_INLINE rvv_type_info<int64_t, rvv_width_m1 * 1>::type
rvv_type_info<int64_t, rvv_width_m1 * 1>::bitcast<__rvv_uint8m1_t>(
__rvv_uint8m1_t x) noexcept
{
return __riscv_vreinterpret_i64m1(__riscv_vreinterpret_u64m1(x));
}
template <>
XSIMD_INLINE rvv_type_info<uint16_t, rvv_width_m1 * 1>::type
rvv_type_info<uint16_t, rvv_width_m1 * 1>::bitcast<__rvv_uint8m1_t>(
__rvv_uint8m1_t x) noexcept
Expand Down Expand Up @@ -179,6 +200,25 @@ namespace xsimd
return __riscv_vreinterpret_u8m1(x);
}

template <>
XSIMD_INLINE rvv_type_info<int16_t, rvv_width_m1 * 1>::byte_type
rvv_type_info<int16_t, rvv_width_m1 * 1>::as_bytes<__rvv_int16m1_t>(__rvv_int16m1_t x) noexcept
{
return __riscv_vreinterpret_u8m1(__riscv_vreinterpret_u16m1(x));
}
template <>
XSIMD_INLINE rvv_type_info<int32_t, rvv_width_m1 * 1>::byte_type
rvv_type_info<int32_t, rvv_width_m1 * 1>::as_bytes<__rvv_int32m1_t>(__rvv_int32m1_t x) noexcept
{
return __riscv_vreinterpret_u8m1(__riscv_vreinterpret_u32m1(x));
}
template <>
XSIMD_INLINE rvv_type_info<int64_t, rvv_width_m1 * 1>::byte_type
rvv_type_info<int64_t, rvv_width_m1 * 1>::as_bytes<__rvv_int64m1_t>(__rvv_int64m1_t x) noexcept
{
return __riscv_vreinterpret_u8m1(__riscv_vreinterpret_u64m1(x));
}

template <>
XSIMD_INLINE rvv_type_info<uint8_t, rvv_width_m1 * 1>::byte_type
rvv_type_info<uint8_t, rvv_width_m1 * 1>::as_bytes<__rvv_uint8m1_t>(__rvv_uint8m1_t x) noexcept
Expand Down
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