arc64: add unaligned access, improve addN patterns.

What is new:
- add munaligned-access option (default off);
- allow addN instruction to work with symbols when they are under 4G.
- allow scalled addresses for store instructions.

Signed-off-by: Claudiu Zissulescu <[email protected]>

Author: Claudiu Zissulescu

gcc/config/arc64/arc64.c

@@ -590,10 +590,11 @@ arc64_legitimate_address_1_p (machine_mode mode,
     return true;
 
   /* Scalled addresses.  */
-  if (load_p
-      && GET_CODE (x) == PLUS
+  if (GET_CODE (x) == PLUS
       && GET_CODE (XEXP (x, 0)) == MULT
-      && REG_P (XEXP (x, 1))
+      && ((load_p && REG_P (XEXP (x, 1)))
+	  || (load_p && CONST_INT_P (XEXP (x, 1)))
+	  || ARC64_CHECK_SMALL_IMMEDIATE (XEXP (x, 1), QImode))
       && REG_P (XEXP (XEXP (x, 0), 0))
       && CONST_INT_P (XEXP (XEXP (x, 0), 1)))
     switch (GET_MODE_SIZE (mode))
@@ -602,7 +603,7 @@ arc64_legitimate_address_1_p (machine_mode mode,
       case 4:
       case 8:
 	if (INTVAL (XEXP (XEXP (x, 0), 1)) == GET_MODE_SIZE (mode))
-	  return true;;
+	  return true;
 	break;
       default:
 	break;

gcc/config/arc64/arc64.h

@@ -87,7 +87,12 @@
 
 /* Set this nonzero if move instructions will actually fail to work
    when given unaligned data.  */
-#define STRICT_ALIGNMENT	1
+#define STRICT_ALIGNMENT        (!unaligned_access)
+
+/* Default unaligned accesses.  */
+#ifndef UNALIGNED_ACCESS_DEFAULT
+#define UNALIGNED_ACCESS_DEFAULT 0
+#endif
 
 /* Layout of Source Language Data Types.  */
 #define SHORT_TYPE_SIZE         16

gcc/config/arc64/arc64.opt

@@ -67,3 +67,7 @@ Enable MPY64 multiplication instructions.
 mcpu=
 Target RejectNegative Joined
 -mcpu= Generate code for specific ARCv3 CPU variant.
+
+munaligned-access
+Target Report Var(unaligned_access) Init(UNALIGNED_ACCESS_DEFAULT)
+Enable unaligned accesses to packed data.

gcc/config/arc64/arith.md

@@ -461,7 +461,7 @@
 	(plus:GPI
 	 (ashift:GPI (match_operand:GPI 1 "register_operand" "q,r,r,r")
 		     (match_operand:GPI 2 "_1_2_3_operand" ""))
-	 (match_operand:GPI 3 "arc64_nonmem_operand"  "0,0,r,S32S0")))]
+	 (match_operand:GPI 3 "arc64_regsym_operand"  "0,0,r,S32S0SymMV")))]
   ""
   "add%2<sfxtab>%?\\t%0,%3,%1"
   [(set_attr "type" "add")
@@ -474,7 +474,7 @@
 	(compare:CC_ZN
 	 (plus:GPI (ashift:GPI (match_operand:GPI 1 "register_operand" "r,r,r")
 			       (match_operand:GPI 2 "_1_2_3_operand" ""))
-		  (match_operand:GPI 3 "arc64_nonmem_operand"  "0,r,S32S0"))
+		  (match_operand:GPI 3 "arc64_regsym_operand"  "0,r,S32S0SymMV"))
 	 (const_int 0)))
    (set (match_operand:GPI 0 "register_operand" "=r,r,r")
 	(plus:GPI (ashift:GPI (match_dup 1) (match_dup 2))
@@ -490,7 +490,7 @@
 	(compare:CC_ZN
 	 (plus:GPI (ashift:GPI (match_operand:GPI 0 "register_operand" "r,r,r")
 			       (match_operand:GPI 1 "_1_2_3_operand" ""))
-		  (match_operand:GPI 2 "arc64_nonmem_operand"  "0,r,S32S0"))
+		  (match_operand:GPI 2 "arc64_regsym_operand"  "0,r,S32S0SymMV"))
 	 (const_int 0)))]
   ""
   "add%1<sfxtab>%?.f\\t0,%2,%1"
@@ -500,7 +500,7 @@
 
 (define_insn "*sub<mode>_shift"
   [(set (match_operand:GPI 0 "register_operand" "=r,r,r")
-	(minus:GPI (match_operand:GPI 1 "arc64_nonmem_operand" "0,r,S32S0")
+	(minus:GPI (match_operand:GPI 1 "arc64_regsym_operand" "0,r,S32S0SymMV")
 		   (ashift:GPI (match_operand:GPI 2 "register_operand" "r,r,r")
 			       (match_operand:GPI 3 "_1_2_3_operand" ""))))]
   ""

gcc/config/arc64/predicates.md

@@ -33,6 +33,16 @@
 		 (ior (match_test "UNSIGNED_INT32 (INTVAL (op))")
 		      (match_test "SIGNED_INT32 (INTVAL (op))"))))))
 
+;; A restricted version of the above, still accepting symbols and label refs.
+(define_predicate "arc64_regsym_operand"
+  (ior (match_operand 0 "register_operand")
+       (and (ior (match_code "label_ref")
+		 (match_code "symbol_ref"))
+	    (match_test "arc64_allow_direct_access_p (op)"))
+       (and (match_code "const_int")
+	    (ior (match_test "UNSIGNED_INT32 (INTVAL (op))")
+		 (match_test "SIGNED_INT32 (INTVAL (op))")))))
+
 (define_predicate "arc64_nonmem_operand"
   (ior (match_operand 0 "register_operand")
        (and (match_code "const_int")