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aarch64: Add -msimd-memops option controlling SIMD usage #60

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This option (enabled by default) preserves existing behavior by allowing use of Advanced SIMD registers while expanding memset/memcpy/memmove operations into inline instructions.

Disabling this option prevents use of these registers for environments where the FPU may be disabled to reduce the cost of saving/restoring the processor state, such as in interrupt handlers.

The second patch in this series disables this option by default for aarch64*-*-elf targets as those are often used for embedded systems with interrupt handlers.

…mcpy

This option (enabled by default) preserves existing behavior by
allowing use of Advanced SIMD registers while expanding
memset/memcpy/memmove operations into inline instructions.

Disabling this option prevents use of these registers for environments
where the FPU may be disabled to reduce the cost of saving/restoring
the processor state, such as in interrupt handlers.

Signed-off-by: Keith Packard <[email protected]>
(cherry picked from commit 65837c3)
These targets are regularly used for embedded applications for
portions of code where the Advanced SIMD registers may not be
preserved, such as interrupt handlers.

Disabling the use of SIMD registers for memset/memcpy operations by
default ensures that code which doesn't overtly perform FPU or SIMD
operations won't end up using those registers unintentially.

Signed-off-by: Keith Packard <[email protected]>
(cherry picked from commit d626b83)
@stephanosio stephanosio merged commit 590fb2e into zephyrproject-rtos:zephyr-gcc-14.3.0 Aug 11, 2025
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