zephyrproject-rtos · anangl · Sep 16, 2025 · Sep 12, 2025
@@ -48,18 +48,90 @@
 #if NRF_REGULATORS_HAS_POF
 
 typedef nrf_regulators_pof_thr_t nrf_power_pof_thr_t;
+#if defined(REGULATORS_POFCON_THRESHOLD_V090)
+#define NRF_POWER_POFTHR_V09     NRF_REGULATORS_POF_THR_0V9
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V095)
+#define NRF_POWER_POFTHR_V095    NRF_REGULATORS_POF_THR_0V95
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V100)
+#define NRF_POWER_POFTHR_V10     NRF_REGULATORS_POF_THR_1V0
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V105)
+#define NRF_POWER_POFTHR_V105    NRF_REGULATORS_POF_THR_1V05
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V110)
+#define NRF_POWER_POFTHR_V11     NRF_REGULATORS_POF_THR_1V1
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V115)
+#define NRF_POWER_POFTHR_V115    NRF_REGULATORS_POF_THR_1V15
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V120)
+#define NRF_POWER_POFTHR_V12     NRF_REGULATORS_POF_THR_1V2
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V125)
+#define NRF_POWER_POFTHR_V125    NRF_REGULATORS_POF_THR_1V25
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V130)
+#define NRF_POWER_POFTHR_V13     NRF_REGULATORS_POF_THR_1V3
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V135)
+#define NRF_POWER_POFTHR_V135    NRF_REGULATORS_POF_THR_1V35
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V140)
+#define NRF_POWER_POFTHR_V14     NRF_REGULATORS_POF_THR_1V4
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V145)
+#define NRF_POWER_POFTHR_V145    NRF_REGULATORS_POF_THR_1V45
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V150)
+#define NRF_POWER_POFTHR_V15     NRF_REGULATORS_POF_THR_1V5
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V155)
+#define NRF_POWER_POFTHR_V155    NRF_REGULATORS_POF_THR_1V55
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V160)
+#define NRF_POWER_POFTHR_V16     NRF_REGULATORS_POF_THR_1V6
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V165)
+#define NRF_POWER_POFTHR_V165    NRF_REGULATORS_POF_THR_1V65
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V17)
 #define NRF_POWER_POFTHR_V17     NRF_REGULATORS_POF_THR_1V7
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V18)
 #define NRF_POWER_POFTHR_V18     NRF_REGULATORS_POF_THR_1V8
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V19)
 #define NRF_POWER_POFTHR_V19     NRF_REGULATORS_POF_THR_1V9
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V20)
 #define NRF_POWER_POFTHR_V20     NRF_REGULATORS_POF_THR_2V0
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V21)
 #define NRF_POWER_POFTHR_V21     NRF_REGULATORS_POF_THR_2V1
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V22)
 #define NRF_POWER_POFTHR_V22     NRF_REGULATORS_POF_THR_2V2
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V23)
 #define NRF_POWER_POFTHR_V23     NRF_REGULATORS_POF_THR_2V3
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V24)
 #define NRF_POWER_POFTHR_V24     NRF_REGULATORS_POF_THR_2V4
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V25)
 #define NRF_POWER_POFTHR_V25     NRF_REGULATORS_POF_THR_2V5
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V26)
 #define NRF_POWER_POFTHR_V26     NRF_REGULATORS_POF_THR_2V6
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V27)
 #define NRF_POWER_POFTHR_V27     NRF_REGULATORS_POF_THR_2V7
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V28)
 #define NRF_POWER_POFTHR_V28     NRF_REGULATORS_POF_THR_2V8
+#endif
 
 #if NRF_REGULATORS_HAS_POF_VDDH
 

@@ -224,7 +224,11 @@ void nrfx_power_pof_disable(void)
 #elif NRF_REGULATORS_HAS_POF
     nrf_regulators_pof_config_t pof_config = {
         .enable = false,
+#if defined(REGULATORS_POFCON_THRESHOLD_V27)
         .thr    = NRF_REGULATORS_POF_THR_2V7,
+#else
+        .thr    = NRF_REGULATORS_POF_THR_1V4,
+#endif
     };
     nrf_regulators_pof_config_set(NRF_REGULATORS, &pof_config);
 #endif

@@ -133,6 +133,13 @@ extern "C" {
 #define NRF_REGULATORS_HAS_INDUCTOR_DET 0
 #endif
 
+#if defined(REGULATORS_HIBERNATOR_SYSTEMHIBERNATE_ResetValue) || defined(__NRFX_DOXYGEN__)
+/** @brief Symbol indicating whether HIBERNATOR register is present. */
+#define NRF_REGULATORS_HAS_HIBERNATOR 1
+#else
+#define NRF_REGULATORS_HAS_HIBERNATOR 0
+#endif
+
 #if NRF_REGULATORS_HAS_VREG_ANY
 /** @brief Voltage regulators. */
 typedef enum
@@ -156,22 +163,90 @@ typedef enum
 /** @brief POF Comparator thresholds. */
 typedef enum
 {
+#if defined(REGULATORS_POFCON_THRESHOLD_V090) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_0V9  = REGULATORS_POFCON_THRESHOLD_V090, ///< Set threshold to 0.9 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V095) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_0V95 = REGULATORS_POFCON_THRESHOLD_V095, ///< Set threshold to 0.95 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V100) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V0  = REGULATORS_POFCON_THRESHOLD_V100, ///< Set threshold to 1.0 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V105) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V05 = REGULATORS_POFCON_THRESHOLD_V105, ///< Set threshold to 1.05 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V110) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V1  = REGULATORS_POFCON_THRESHOLD_V110, ///< Set threshold to 1.1 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V115) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V15 = REGULATORS_POFCON_THRESHOLD_V115, ///< Set threshold to 1.15 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V120) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V2  = REGULATORS_POFCON_THRESHOLD_V120, ///< Set threshold to 1.2 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V125) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V25 = REGULATORS_POFCON_THRESHOLD_V125, ///< Set threshold to 1.25 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V130) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V3  = REGULATORS_POFCON_THRESHOLD_V130, ///< Set threshold to 1.3 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V135) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V35 = REGULATORS_POFCON_THRESHOLD_V135, ///< Set threshold to 1.35 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V140) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V4  = REGULATORS_POFCON_THRESHOLD_V140, ///< Set threshold to 1.4 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V145) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V45 = REGULATORS_POFCON_THRESHOLD_V145, ///< Set threshold to 1.45 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V150) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V5  = REGULATORS_POFCON_THRESHOLD_V150, ///< Set threshold to 1.5 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V155) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V55 = REGULATORS_POFCON_THRESHOLD_V155, ///< Set threshold to 1.55 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V160) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V6  = REGULATORS_POFCON_THRESHOLD_V160, ///< Set threshold to 1.6 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V165) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V65 = REGULATORS_POFCON_THRESHOLD_V165, ///< Set threshold to 1.65 V.
+#endif
 #if defined(REGULATORS_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__)
-    NRF_REGULATORS_POF_THR_1V7 = REGULATORS_POFCON_THRESHOLD_V17, ///< Set threshold to 1.7 V.
+    NRF_REGULATORS_POF_THR_1V7  = REGULATORS_POFCON_THRESHOLD_V17,  ///< Set threshold to 1.7 V.
 #endif
 #if defined(REGULATORS_POFCON_THRESHOLD_V18) || defined(__NRFX_DOXYGEN__)
-    NRF_REGULATORS_POF_THR_1V8 = REGULATORS_POFCON_THRESHOLD_V18, ///< Set threshold to 1.8 V.
-#endif
-    NRF_REGULATORS_POF_THR_1V9 = REGULATORS_POFCON_THRESHOLD_V19, ///< Set threshold to 1.9 V.
-    NRF_REGULATORS_POF_THR_2V0 = REGULATORS_POFCON_THRESHOLD_V20, ///< Set threshold to 2.0 V.
-    NRF_REGULATORS_POF_THR_2V1 = REGULATORS_POFCON_THRESHOLD_V21, ///< Set threshold to 2.1 V.
-    NRF_REGULATORS_POF_THR_2V2 = REGULATORS_POFCON_THRESHOLD_V22, ///< Set threshold to 2.2 V.
-    NRF_REGULATORS_POF_THR_2V3 = REGULATORS_POFCON_THRESHOLD_V23, ///< Set threshold to 2.3 V.
-    NRF_REGULATORS_POF_THR_2V4 = REGULATORS_POFCON_THRESHOLD_V24, ///< Set threshold to 2.4 V.
-    NRF_REGULATORS_POF_THR_2V5 = REGULATORS_POFCON_THRESHOLD_V25, ///< Set threshold to 2.5 V.
-    NRF_REGULATORS_POF_THR_2V6 = REGULATORS_POFCON_THRESHOLD_V26, ///< Set threshold to 2.6 V.
-    NRF_REGULATORS_POF_THR_2V7 = REGULATORS_POFCON_THRESHOLD_V27, ///< Set threshold to 2.7 V.
-    NRF_REGULATORS_POF_THR_2V8 = REGULATORS_POFCON_THRESHOLD_V28, ///< Set threshold to 2.8 V.
+    NRF_REGULATORS_POF_THR_1V8  = REGULATORS_POFCON_THRESHOLD_V18,  ///< Set threshold to 1.8 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V19) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_1V9  = REGULATORS_POFCON_THRESHOLD_V19,  ///< Set threshold to 1.9 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V20) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V0  = REGULATORS_POFCON_THRESHOLD_V20,  ///< Set threshold to 2.0 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V21) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V1  = REGULATORS_POFCON_THRESHOLD_V21,  ///< Set threshold to 2.1 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V22) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V2  = REGULATORS_POFCON_THRESHOLD_V22,  ///< Set threshold to 2.2 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V23) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V3  = REGULATORS_POFCON_THRESHOLD_V23,  ///< Set threshold to 2.3 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V24) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V4  = REGULATORS_POFCON_THRESHOLD_V24,  ///< Set threshold to 2.4 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V25) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V5  = REGULATORS_POFCON_THRESHOLD_V25,  ///< Set threshold to 2.5 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V26) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V6  = REGULATORS_POFCON_THRESHOLD_V26,  ///< Set threshold to 2.6 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V27) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V7  = REGULATORS_POFCON_THRESHOLD_V27,  ///< Set threshold to 2.7 V.
+#endif
+#if defined(REGULATORS_POFCON_THRESHOLD_V28) || defined(__NRFX_DOXYGEN__)
+    NRF_REGULATORS_POF_THR_2V8  = REGULATORS_POFCON_THRESHOLD_V28,  ///< Set threshold to 2.8 V.
+#endif
 } nrf_regulators_pof_thr_t;
 #endif
 
@@ -346,6 +421,34 @@ NRF_STATIC_INLINE uint32_t nrf_regulators_elv_mode_allow_get(NRF_REGULATORS_Type
 NRF_STATIC_INLINE bool nrf_regulators_inductor_check(NRF_REGULATORS_Type const * p_reg);
 #endif
 
+#if NRF_REGULATORS_HAS_HIBERNATOR
+/**
+ * @brief Function for putting the CPU in hibernation mode.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ */
+NRF_STATIC_INLINE void nrf_regulators_system_hibernate(NRF_REGULATORS_Type * p_reg);
+
+/**
+ * @brief Function for enabling or disabling the GPIO retention release on wake up
+ *        from hibernation mode.
+ *
+ * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
+ * @param[in] enable True if GPIO retention release is to be enabled, false otherwise.
+ */
+NRF_STATIC_INLINE void nrf_regulators_gpio_retention_release_set(NRF_REGULATORS_Type * p_reg,
+                                                                 bool                  enable);
+/**
+ * @brief Function for checking the GPIO retention status.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval true  GPIO retention is active.
+ * @retval false GPIO retention is not active.
+ */
+NRF_STATIC_INLINE bool nrf_regulators_gpio_retention_check(NRF_REGULATORS_Type const * p_reg);
+#endif
+
 #ifndef NRF_DECLARE_ONLY
 
 #if NRF_REGULATORS_HAS_VREG_ANY
@@ -539,6 +642,31 @@ NRF_STATIC_INLINE bool nrf_regulators_inductor_check(NRF_REGULATORS_Type const *
 }
 #endif
 
+#if NRF_REGULATORS_HAS_HIBERNATOR
+NRF_STATIC_INLINE void nrf_regulators_system_hibernate(NRF_REGULATORS_Type * p_reg)
+{
+    p_reg->HIBERNATOR.SYSTEMHIBERNATE =
+        REGULATORS_HIBERNATOR_SYSTEMHIBERNATE_SYSTEMHIBERNATE_Enter;
+}
+
+NRF_STATIC_INLINE void nrf_regulators_gpio_retention_release_set(NRF_REGULATORS_Type * p_reg,
+                                                                 bool                  enable)
+{
+    p_reg->HIBERNATOR.GPIORETENTIONRELEASE = (enable
+            ? REGULATORS_HIBERNATOR_GPIORETENTIONRELEASE_GPIORETENTIONRELEASE_Release
+            : REGULATORS_HIBERNATOR_GPIORETENTIONRELEASE_GPIORETENTIONRELEASE_NoRelease)
+            << REGULATORS_HIBERNATOR_GPIORETENTIONRELEASE_GPIORETENTIONRELEASE_Pos;
+}
+
+NRF_STATIC_INLINE bool nrf_regulators_gpio_retention_check(NRF_REGULATORS_Type const * p_reg)
+{
+    return (p_reg->HIBERNATOR.GPIORETENTIONSTATUS
+            & REGULATORS_HIBERNATOR_GPIORETENTIONSTATUS_GPIORETENTIONSTATUS_Msk)
+            >> REGULATORS_HIBERNATOR_GPIORETENTIONSTATUS_GPIORETENTIONSTATUS_Pos
+            == REGULATORS_HIBERNATOR_GPIORETENTIONSTATUS_GPIORETENTIONSTATUS_Active;
+}
+#endif
+
 #endif // NRF_DECLARE_ONLY
 
 /** @} */

@@ -448,6 +448,7 @@ typedef enum
     NRF_SAADC_EVENT_CH2_LIMITL    = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL),  ///< Last result is equal or below CH[2].LIMIT.LOW.
     NRF_SAADC_EVENT_CH3_LIMITH    = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH),  ///< Last result is equal or above CH[3].LIMIT.HIGH.
     NRF_SAADC_EVENT_CH3_LIMITL    = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL),  ///< Last result is equal or below CH[3].LIMIT.LOW.
+#if (SAADC_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
     NRF_SAADC_EVENT_CH4_LIMITH    = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH),  ///< Last result is equal or above CH[4].LIMIT.HIGH.
     NRF_SAADC_EVENT_CH4_LIMITL    = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL),  ///< Last result is equal or below CH[4].LIMIT.LOW.
     NRF_SAADC_EVENT_CH5_LIMITH    = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH),  ///< Last result is equal or above CH[5].LIMIT.HIGH.
@@ -456,6 +457,7 @@ typedef enum
     NRF_SAADC_EVENT_CH6_LIMITL    = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL),  ///< Last result is equal or below CH[6].LIMIT.LOW.
     NRF_SAADC_EVENT_CH7_LIMITH    = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH),  ///< Last result is equal or above CH[7].LIMIT.HIGH.
     NRF_SAADC_EVENT_CH7_LIMITL    = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL)   ///< Last result is equal or below CH[7].LIMIT.LOW.
+#endif
 } nrf_saadc_event_t;
 
 /** @brief Analog-to-digital converter interrupt masks. */
@@ -475,6 +477,7 @@ typedef enum
     NRF_SAADC_INT_CH2LIMITL     = SAADC_INTENSET_CH2LIMITL_Msk,     ///< Interrupt on EVENTS_CH[2].LIMITL event.
     NRF_SAADC_INT_CH3LIMITH     = SAADC_INTENSET_CH3LIMITH_Msk,     ///< Interrupt on EVENTS_CH[3].LIMITH event.
     NRF_SAADC_INT_CH3LIMITL     = SAADC_INTENSET_CH3LIMITL_Msk,     ///< Interrupt on EVENTS_CH[3].LIMITL event.
+#if (SAADC_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
     NRF_SAADC_INT_CH4LIMITH     = SAADC_INTENSET_CH4LIMITH_Msk,     ///< Interrupt on EVENTS_CH[4].LIMITH event.
     NRF_SAADC_INT_CH4LIMITL     = SAADC_INTENSET_CH4LIMITL_Msk,     ///< Interrupt on EVENTS_CH[4].LIMITL event.
     NRF_SAADC_INT_CH5LIMITH     = SAADC_INTENSET_CH5LIMITH_Msk,     ///< Interrupt on EVENTS_CH[5].LIMITH event.
@@ -483,6 +486,7 @@ typedef enum
     NRF_SAADC_INT_CH6LIMITL     = SAADC_INTENSET_CH6LIMITL_Msk,     ///< Interrupt on EVENTS_CH[6].LIMITL event.
     NRF_SAADC_INT_CH7LIMITH     = SAADC_INTENSET_CH7LIMITH_Msk,     ///< Interrupt on EVENTS_CH[7].LIMITH event.
     NRF_SAADC_INT_CH7LIMITL     = SAADC_INTENSET_CH7LIMITL_Msk,     ///< Interrupt on EVENTS_CH[7].LIMITL event.
+#endif
     NRF_SAADC_INT_ALL           = 0x7FFFFFFFUL                      ///< Mask of all interrupts.
 } nrf_saadc_int_mask_t;
 

@@ -38,7 +38,7 @@ POSSIBILITY OF SUCH DAMAGE.
 /* MDK version */
 #define MDK_MAJOR_VERSION   8 
 #define MDK_MINOR_VERSION   72 
-#define MDK_MICRO_VERSION   2 
+#define MDK_MICRO_VERSION   3 
 
 
 /* Define coprocessor domains */