mcux: Enable flexio hal driver to support flexio IP on S32 SoCs

Flexio IP functions in mcux and S32 SoCs are quite similar
This commit enables the existing flexio driver to support
Flexio IP on S32 SoCs by adding PIN Operations and NO DOZE mode.

Signed-off-by: Sumit Batra <[email protected]>

Author: sumitbatra-nxp

mcux/mcux-sdk-ng/README

@@ -46,4 +46,5 @@ Patch List:
   - drivers/adc12/fsl_adc12.c: add guards to avoid compilation warnings when building
       with SDK clock control driver disabled.
   - drivers: irqsteer: adjust CHn_MASK index computation
-  - drivers: flexio lcd: Pass a parameter to the GPIO callback functions
+  - drivers: flexio: lcd: Pass a parameter to the GPIO callback functions
+  - drivers: flexio: Enable flexio hal driver to support flexio IP on S32 SoCs

mcux/mcux-sdk-ng/drivers/flexio/fsl_flexio.c

@@ -114,13 +114,19 @@ void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)
     FLEXIO_Reset(base);
 
     ctrlReg = base->CTRL;
+#if !(defined(FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT) && (FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT == 0))
     ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CTRL_FLEXEN_MASK);
+#else
+    ctrlReg &= ~(FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CTRL_FLEXEN_MASK);
+#endif
     ctrlReg |= (FLEXIO_CTRL_DBGE(userConfig->enableInDebug) | FLEXIO_CTRL_FASTACC(userConfig->enableFastAccess) |
                 FLEXIO_CTRL_FLEXEN(userConfig->enableFlexio));
+#if !(defined(FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT) && (FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT == 0))
     if (!userConfig->enableInDoze)
     {
         ctrlReg |= FLEXIO_CTRL_DOZEN_MASK;
     }
+#endif
 
     base->CTRL = ctrlReg;
 }
@@ -160,7 +166,9 @@ void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)
     (void)memset(userConfig, 0, sizeof(*userConfig));
 
     userConfig->enableFlexio     = true;
+#if !(defined(FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT) && (FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT == 0))
     userConfig->enableInDoze     = false;
+#endif
     userConfig->enableInDebug    = true;
     userConfig->enableFastAccess = false;
 }

mcux/mcux-sdk-ng/drivers/flexio/fsl_flexio.h

@@ -67,6 +67,7 @@ typedef enum _flexio_timer_mode
     kFLEXIO_TimerModeDual8BitBaudBit = 0x1U, /*!< Dual 8-bit counters baud/bit mode. */
     kFLEXIO_TimerModeDual8BitPWM     = 0x2U, /*!< Dual 8-bit counters PWM mode. */
     kFLEXIO_TimerModeSingle16Bit     = 0x3U, /*!< Single 16-bit counter mode. */
+    kFLEXIO_TimerModeDual8BitPWMLow  = 0x6U, /*!< Dual 8-bit counters PWM Low mode. */
 } flexio_timer_mode_t;
 
 /*! @brief Define type of timer initial output or timer reset condition.*/
@@ -239,7 +240,9 @@ typedef enum _flexio_shifter_buffer_type
 typedef struct _flexio_config_
 {
     bool enableFlexio;     /*!< Enable/disable FlexIO module */
+#if !(defined(FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT) && (FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT == 0))
     bool enableInDoze;     /*!< Enable/disable FlexIO operation in doze mode */
+#endif
     bool enableInDebug;    /*!< Enable/disable FlexIO operation in debug mode */
     bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, fast access requires
                            the FlexIO clock to be at least twice the frequency of the bus clock. */
@@ -895,6 +898,50 @@ static inline uint32_t FLEXIO_GetPinStatus(FLEXIO_Type *base, uint32_t pin)
     return (((base->PINSTAT) >> pin) & 0x01U);
 }
 
+/*!
+ * @brief Sets the FLEXIO output pin level.
+ *
+ * @param base   FlexIO peripheral base address
+ * @param pin    FlexIO pin number.
+ * @param level  FlexIO output pin level to set, can be either 0 or 1.
+ */
+static inline void FLEXIO_SetPinLevel(FLEXIO_Type *base, uint8_t pin, bool level)
+{
+	base->PINOUTD =
+		(base->PINOUTD & ~((uint32_t)((uint32_t)1U << pin))) |
+		(FLEXIO_PINOUTD_OUTD((uint32_t)((true == level)
+		? (uint32_t)0x1U : (uint32_t)0x0U) << pin));
+}
+
+/*!
+ * @brief Gets the enabled status of a FLEXIO output pin.
+ *
+ * @param base   FlexIO peripheral base address
+ * @param pin    FlexIO pin number.
+ * @retval       FlexIO port enabled status
+ *        - 0: corresponding output pin is in disabled state.
+ *        - 1: corresponding output pin is in enabled state.
+ */
+static inline bool FLEXIO_GetPinOverride(const FLEXIO_Type *const base, uint8_t pin)
+{
+	return ((base->PINOUTE & (uint32_t)((uint32_t)1U << pin)) != 0UL);
+}
+
+/*!
+ * @brief Enables or disables a FLEXIO output pin.
+ *
+ * @param base     FlexIO peripheral base address
+ * @param pin      Flexio pin number.
+ * @param enabled  Enable or disable the FlexIO pin.
+ */
+static inline void FLEXIO_ConfigPinOverride(FLEXIO_Type *base, uint8_t pin, bool enabled)
+{
+	base->PINOUTE =
+		(base->PINOUTE & ~((uint32_t)((uint32_t)1U << pin))) |
+		FLEXIO_PINOUTE_OUTE((uint32_t)((true == enabled)
+		? (uint32_t)0x1U : (uint32_t)0x0U) << pin);
+}
+
 /*!
  * @brief Clears the multiple FLEXIO input pins status.
  *