Skip to content

Commit e8ccf3e

Browse files
haduongquangmanuargue
haduongquang
authored and
manuargue
committed
dts: s32: update pinmux definitions for S32Z27
Pinmux was updated based on S32Z27 RM Rev3. Signed-off-by: Ha Duong Quang <[email protected]>
1 parent 144ade3 commit e8ccf3e

File tree

2 files changed

+36
-68
lines changed

2 files changed

+36
-68
lines changed

‎dts/nxp/s32/S32Z27-BGA400-pinctrl.h

Lines changed: 14 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -626,12 +626,11 @@
626626
#define PE0_DSPI_3_PCS1 NXP_S32_PINMUX(1, 1, 48, 5, 0, 0)
627627
#define PE1_DSPI_3_PCS2 NXP_S32_PINMUX(1, 1, 49, 5, 0, 0)
628628

629-
/* I3C_1 */
630-
#define PE7_I3C_1_PUR NXP_S32_PINMUX(1, 1, 55, 4, 0, 0)
631-
#define PE8_I3C_1_SCL_O NXP_S32_PINMUX(1, 1, 56, 3, 0, 0)
632-
#define PE8_I3C_1_SCL_I NXP_S32_PINMUX(1, 1, 56, 0, 180, 3)
633-
#define PE9_I3C_1_SDA0_O NXP_S32_PINMUX(1, 1, 57, 3, 0, 0)
634-
#define PE9_I3C_1_SDA0_I NXP_S32_PINMUX(1, 1, 57, 0, 181, 3)
629+
/* LPI2C_1 */
630+
#define PE8_I2C_1_SCL_O NXP_S32_PINMUX(1, 1, 56, 3, 0, 0)
631+
#define PE8_I2C_1_SCL_I NXP_S32_PINMUX(1, 1, 56, 0, 180, 3)
632+
#define PE9_I2C_1_SDA_O NXP_S32_PINMUX(1, 1, 57, 3, 0, 0)
633+
#define PE9_I2C_1_SDA_I NXP_S32_PINMUX(1, 1, 57, 0, 181, 3)
635634

636635
/* LINFLEX_4 */
637636
#define PD15_LIN_4_TX NXP_S32_PINMUX(1, 1, 47, 6, 0, 0)
@@ -756,23 +755,15 @@
756755
#define PL0_DSPI_6_PCS1 NXP_S32_PINMUX(4, 4, 144, 2, 0, 0)
757756
#define PL1_DSPI_6_PCS2 NXP_S32_PINMUX(4, 4, 145, 2, 0, 0)
758757

759-
/* I3C_2 */
760-
#define PI10_I3C_2_SCL_O NXP_S32_PINMUX(4, 4, 106, 6, 0, 0)
761-
#define PI10_I3C_2_SCL_I NXP_S32_PINMUX(4, 4, 106, 0, 311, 2)
762-
#define PI11_I3C_2_PUR NXP_S32_PINMUX(4, 4, 107, 4, 0, 0)
763-
#define PI12_I3C_2_SDA0_O NXP_S32_PINMUX(4, 4, 108, 5, 0, 0)
764-
#define PI12_I3C_2_SDA0_I NXP_S32_PINMUX(4, 4, 108, 0, 312, 2)
765-
#define PI13_I3C_2_SDA1_O NXP_S32_PINMUX(4, 4, 109, 5, 0, 0)
766-
#define PI13_I3C_2_SDA1_I NXP_S32_PINMUX(4, 4, 109, 0, 313, 2)
767-
#define PI14_I3C_2_SDA2_O NXP_S32_PINMUX(4, 4, 110, 6, 0, 0)
768-
#define PI14_I3C_2_SDA2_I NXP_S32_PINMUX(4, 4, 110, 0, 314, 2)
769-
#define PI15_I3C_2_SDA3_O NXP_S32_PINMUX(4, 4, 111, 4, 0, 0)
770-
#define PI15_I3C_2_SDA3_I NXP_S32_PINMUX(4, 4, 111, 0, 315, 2)
771-
#define PJ9_I3C_2_PUR NXP_S32_PINMUX(4, 4, 121, 5, 0, 0)
772-
#define PJ10_I3C_2_SCL_O NXP_S32_PINMUX(4, 4, 122, 4, 0, 0)
773-
#define PJ10_I3C_2_SCL_I NXP_S32_PINMUX(4, 4, 122, 0, 311, 3)
774-
#define PJ11_I3C_2_SDA0_O NXP_S32_PINMUX(4, 4, 123, 5, 0, 0)
775-
#define PJ11_I3C_2_SDA0_I NXP_S32_PINMUX(4, 4, 123, 0, 312, 3)
758+
/* LPI2C_2 */
759+
#define PI10_I2C_2_SCL_O NXP_S32_PINMUX(4, 4, 106, 6, 0, 0)
760+
#define PI10_I2C_2_SCL_I NXP_S32_PINMUX(4, 4, 106, 0, 311, 2)
761+
#define PI12_I2C_2_SDA_O NXP_S32_PINMUX(4, 4, 108, 5, 0, 0)
762+
#define PI12_I2C_2_SDA_I NXP_S32_PINMUX(4, 4, 108, 0, 312, 2)
763+
#define PJ10_I2C_2_SCL_O NXP_S32_PINMUX(4, 4, 122, 4, 0, 0)
764+
#define PJ10_I2C_2_SCL_I NXP_S32_PINMUX(4, 4, 122, 0, 311, 3)
765+
#define PJ11_I2C_2_SDA_O NXP_S32_PINMUX(4, 4, 123, 5, 0, 0)
766+
#define PJ11_I2C_2_SDA_I NXP_S32_PINMUX(4, 4, 123, 0, 312, 3)
776767

777768
/* SPI_5 */
778769
#define PJ0_DSPI_5_SOUT NXP_S32_PINMUX(4, 4, 112, 3, 0, 0)

‎dts/nxp/s32/S32Z27-BGA594-pinctrl.h

Lines changed: 22 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -833,34 +833,19 @@
833833
#define PE0_DSPI_3_PCS1 NXP_S32_PINMUX(1, 1, 48, 5, 0, 0)
834834
#define PE1_DSPI_3_PCS2 NXP_S32_PINMUX(1, 1, 49, 5, 0, 0)
835835

836-
/* I3C_1 */
837-
#define PC15_I3C_1_SDA0_O NXP_S32_PINMUX(1, 1, 31, 3, 0, 0)
838-
#define PC15_I3C_1_SDA0_I NXP_S32_PINMUX(1, 1, 31, 0, 181, 2)
839-
#define PD0_I3C_1_SCL_O NXP_S32_PINMUX(1, 1, 32, 2, 0, 0)
840-
#define PD0_I3C_1_SCL_I NXP_S32_PINMUX(1, 1, 32, 0, 180, 2)
841-
#define PD1_I3C_1_PUR NXP_S32_PINMUX(1, 1, 33, 3, 0, 0)
842-
#define PD2_I3C_1_SDA1_O NXP_S32_PINMUX(1, 1, 34, 4, 0, 0)
843-
#define PD2_I3C_1_SDA1_I NXP_S32_PINMUX(1, 1, 34, 0, 182, 2)
844-
#define PD3_I3C_1_SDA2_O NXP_S32_PINMUX(1, 1, 35, 3, 0, 0)
845-
#define PD3_I3C_1_SDA2_I NXP_S32_PINMUX(1, 1, 35, 0, 183, 2)
846-
#define PD4_I3C_1_SDA3_O NXP_S32_PINMUX(1, 1, 36, 4, 0, 0)
847-
#define PD4_I3C_1_SDA3_I NXP_S32_PINMUX(1, 1, 36, 0, 184, 2)
848-
#define PE7_I3C_1_PUR NXP_S32_PINMUX(1, 1, 55, 4, 0, 0)
849-
#define PE8_I3C_1_SCL_O NXP_S32_PINMUX(1, 1, 56, 3, 0, 0)
850-
#define PE8_I3C_1_SCL_I NXP_S32_PINMUX(1, 1, 56, 0, 180, 3)
851-
#define PE9_I3C_1_SDA0_O NXP_S32_PINMUX(1, 1, 57, 3, 0, 0)
852-
#define PE9_I3C_1_SDA0_I NXP_S32_PINMUX(1, 1, 57, 0, 181, 3)
853-
#define PG0_I3C_1_SDA3_O NXP_S32_PINMUX(1, 1, 80, 3, 0, 0)
854-
#define PG0_I3C_1_SDA3_I NXP_S32_PINMUX(1, 1, 80, 0, 184, 3)
855-
#define PG1_I3C_1_SDA2_O NXP_S32_PINMUX(1, 1, 81, 3, 0, 0)
856-
#define PG1_I3C_1_SDA2_I NXP_S32_PINMUX(1, 1, 81, 0, 183, 3)
857-
#define PG2_I3C_1_SDA1_O NXP_S32_PINMUX(1, 1, 82, 3, 0, 0)
858-
#define PG2_I3C_1_SDA1_I NXP_S32_PINMUX(1, 1, 82, 0, 182, 3)
859-
#define PG3_I3C_1_SDA0_O NXP_S32_PINMUX(1, 1, 83, 3, 0, 0)
860-
#define PG3_I3C_1_SDA0_I NXP_S32_PINMUX(1, 1, 83, 0, 181, 4)
861-
#define PG4_I3C_1_SCL_O NXP_S32_PINMUX(1, 1, 84, 3, 0, 0)
862-
#define PG4_I3C_1_SCL_I NXP_S32_PINMUX(1, 1, 84, 0, 180, 4)
863-
#define PG5_I3C_1_PUR NXP_S32_PINMUX(1, 1, 85, 3, 0, 0)
836+
/* LPI2C_1 */
837+
#define PC15_I2C_1_SDA_O NXP_S32_PINMUX(1, 1, 31, 3, 0, 0)
838+
#define PC15_I2C_1_SDA_I NXP_S32_PINMUX(1, 1, 31, 0, 181, 2)
839+
#define PD0_I2C_1_SCL_O NXP_S32_PINMUX(1, 1, 32, 2, 0, 0)
840+
#define PD0_I2C_1_SCL_I NXP_S32_PINMUX(1, 1, 32, 0, 180, 2)
841+
#define PE8_I2C_1_SCL_O NXP_S32_PINMUX(1, 1, 56, 3, 0, 0)
842+
#define PE8_I2C_1_SCL_I NXP_S32_PINMUX(1, 1, 56, 0, 180, 3)
843+
#define PE9_I2C_1_SDA_O NXP_S32_PINMUX(1, 1, 57, 3, 0, 0)
844+
#define PE9_I2C_1_SDA_I NXP_S32_PINMUX(1, 1, 57, 0, 181, 3)
845+
#define PG3_I2C_1_SDA_O NXP_S32_PINMUX(1, 1, 83, 3, 0, 0)
846+
#define PG3_I2C_1_SDA_I NXP_S32_PINMUX(1, 1, 83, 0, 181, 4)
847+
#define PG4_I2C_1_SCL_O NXP_S32_PINMUX(1, 1, 84, 3, 0, 0)
848+
#define PG4_I2C_1_SCL_I NXP_S32_PINMUX(1, 1, 84, 0, 180, 4)
864849

865850
/* LINFLEX_4 */
866851
#define PC15_LIN_4_TX NXP_S32_PINMUX(1, 1, 31, 4, 0, 0)
@@ -1036,23 +1021,15 @@
10361021
#define PL0_DSPI_6_PCS1 NXP_S32_PINMUX(4, 4, 144, 2, 0, 0)
10371022
#define PL1_DSPI_6_PCS2 NXP_S32_PINMUX(4, 4, 145, 2, 0, 0)
10381023

1039-
/* I3C_2 */
1040-
#define PI10_I3C_2_SCL_O NXP_S32_PINMUX(4, 4, 106, 6, 0, 0)
1041-
#define PI10_I3C_2_SCL_I NXP_S32_PINMUX(4, 4, 106, 0, 311, 2)
1042-
#define PI11_I3C_2_PUR NXP_S32_PINMUX(4, 4, 107, 4, 0, 0)
1043-
#define PI12_I3C_2_SDA0_O NXP_S32_PINMUX(4, 4, 108, 5, 0, 0)
1044-
#define PI12_I3C_2_SDA0_I NXP_S32_PINMUX(4, 4, 108, 0, 312, 2)
1045-
#define PI13_I3C_2_SDA1_O NXP_S32_PINMUX(4, 4, 109, 5, 0, 0)
1046-
#define PI13_I3C_2_SDA1_I NXP_S32_PINMUX(4, 4, 109, 0, 313, 2)
1047-
#define PI14_I3C_2_SDA2_O NXP_S32_PINMUX(4, 4, 110, 6, 0, 0)
1048-
#define PI14_I3C_2_SDA2_I NXP_S32_PINMUX(4, 4, 110, 0, 314, 2)
1049-
#define PI15_I3C_2_SDA3_O NXP_S32_PINMUX(4, 4, 111, 4, 0, 0)
1050-
#define PI15_I3C_2_SDA3_I NXP_S32_PINMUX(4, 4, 111, 0, 315, 2)
1051-
#define PJ9_I3C_2_PUR NXP_S32_PINMUX(4, 4, 121, 5, 0, 0)
1052-
#define PJ10_I3C_2_SCL_O NXP_S32_PINMUX(4, 4, 122, 4, 0, 0)
1053-
#define PJ10_I3C_2_SCL_I NXP_S32_PINMUX(4, 4, 122, 0, 311, 3)
1054-
#define PJ11_I3C_2_SDA0_O NXP_S32_PINMUX(4, 4, 123, 5, 0, 0)
1055-
#define PJ11_I3C_2_SDA0_I NXP_S32_PINMUX(4, 4, 123, 0, 312, 3)
1024+
/* LPI2C_2 */
1025+
#define PI10_I2C_2_SCL_O NXP_S32_PINMUX(4, 4, 106, 6, 0, 0)
1026+
#define PI10_I2C_2_SCL_I NXP_S32_PINMUX(4, 4, 106, 0, 311, 2)
1027+
#define PI12_I2C_2_SDA_O NXP_S32_PINMUX(4, 4, 108, 5, 0, 0)
1028+
#define PI12_I2C_2_SDA_I NXP_S32_PINMUX(4, 4, 108, 0, 312, 2)
1029+
#define PJ10_I2C_2_SCL_O NXP_S32_PINMUX(4, 4, 122, 4, 0, 0)
1030+
#define PJ10_I2C_2_SCL_I NXP_S32_PINMUX(4, 4, 122, 0, 311, 3)
1031+
#define PJ11_I2C_2_SDA_O NXP_S32_PINMUX(4, 4, 123, 5, 0, 0)
1032+
#define PJ11_I2C_2_SDA_I NXP_S32_PINMUX(4, 4, 123, 0, 312, 3)
10561033

10571034
/* SPI_5 */
10581035
#define PJ0_DSPI_5_SOUT NXP_S32_PINMUX(4, 4, 112, 3, 0, 0)

0 commit comments

Comments
 (0)