Add support for NXP S32K566 SoC #644
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Add baremetal drivers (RTD 0.8.0) for S32K5 Signed-off-by: Dat Nguyen Duy <[email protected]>
Add generated configuration through NXP S32 Design Studio for Clock, OsIf, ADC and eMIOS Signed-off-by: Ha Duong Quang <[email protected]>
- Relocate uninitialized non-cacheable variables into .nocache (NOLOAD) section - Remove 'u' suffix from macros so that they can be used with LISTIFY. - Patch to correct the max resolution and fix the issue clear the EOC flag for ADC. - Redefine CONTROLS.CSC/CV to CONTROLS.CnSC/CnV to reuse the MCUX FTM. - Remove STM.h and SWT.h header files due to we are using native driver for counter and watchdog. - Rename the PIT struct from TIMER to CHANNEL so that the MCUX PIT driver can be reused. - Glue value used for eMIOS PWM with devicetree Signed-off-by: Ha Duong Quang <[email protected]>
Glue mcux driver for s32k566 Signed-off-by: Dat Nguyen Duy <[email protected]>
Add pinmux headers for s32k56x Signed-off-by: Dat Nguyen Duy <[email protected]>
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This PR introduces support for the NXP S32K566 SoC: