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khoa-nguyen-18KhiemNguyenT
khoa-nguyen-18
authored and
KhiemNguyenT
committed
hal: renesas: Add an OFS DTS condition that depends on the node status
Add an OFS DTS condition that depends on the node status Signed-off-by: Khoa Nguyen <[email protected]>
1 parent 3e5e68b commit 0f4be4c

20 files changed

+487
-88
lines changed

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2a1/bsp_mcu_ofs_cfg.h

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,11 @@
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
66

7+
#include <zephyr/devicetree.h>
8+
79
#ifndef BSP_MCU_OFS_CFG_H_
810
#define BSP_MCU_OFS_CFG_H_
11+
912
#define OFS_IWDT (0xA001A001 | 1 << 1 | 3 << 2 | 15 << 4 | 3 << 8 | 3 << 10 | 1 << 12 | 1 << 14)
1013
#define OFS_WDT (1 << 17 | 3 << 18 | 15 << 20 | 3 << 24 | 3 << 26 | 1 << 28 | 1 << 30)
1114
#define BSP_CFG_OPTION_SETTING_OFS0 (OFS_IWDT | OFS_WDT)
@@ -16,6 +19,8 @@
1619
#ifndef BSP_CFG_OPTION_SETTING_SECMPU
1720
#define BSP_CFG_OPTION_SETTING_SECMPU 0x0003FFFC,0x0003FFFF,0x0003FFFC,0x0003FFFF,0x0003FFFC,0x0003FFFF,0x20007FFC,0x20007FFF,0x400DFFFC,0x400DFFFF,0x400DFFFC,0x400DFFFF,0xFFFFFFFF
1821
#endif
22+
23+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_osis))
1924
/*
2025
ID Code
2126
Note: To permanently lock and disable the debug interface define the BSP_ID_CODE_PERMANENTLY_LOCKED in the compiler settings.
@@ -34,14 +39,11 @@ Please read the HWM for full details of the clearing process.
3439
#define BSP_CFG_ID_CODE_LONG_4 (0x00000000)
3540
#else
3641
/* ID Code: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */
37-
3842
#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF)
39-
4043
#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF)
41-
4244
#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF)
43-
4445
#define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF)
4546
#endif
4647
#define BSP_CFG_OPTION_SETTING_OSIS BSP_CFG_ID_CODE_LONG_1, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_2, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_3, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_4, 0xFFFFFFFF
48+
#endif /* option_setting_osis */
4749
#endif /* BSP_MCU_OFS_CFG_H_ */

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2l1/bsp_mcu_ofs_cfg.h

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,11 @@
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
66

7+
#include <zephyr/devicetree.h>
8+
79
#ifndef BSP_MCU_OFS_CFG_H_
810
#define BSP_MCU_OFS_CFG_H_
11+
912
#define OFS_IWDT (0xA001A001 | 1 << 1 | 3 << 2 | 15 << 4 | 3 << 8 | 3 << 10 | 1 << 12 | 1 << 14)
1013
#define OFS_WDT (1 << 17 | 3 << 18 | 15 << 20 | 3 << 24 | 3 << 26 | 1 << 28 | 1 << 30)
1114
#define BSP_CFG_OPTION_SETTING_OFS0 (OFS_IWDT | OFS_WDT)
@@ -16,6 +19,8 @@
1619
#ifndef BSP_CFG_OPTION_SETTING_SECMPU
1720
#define BSP_CFG_OPTION_SETTING_SECMPU 0x0003FFFC,0x0003FFFF,0x0003FFFC,0x0003FFFF,0x0003FFFC,0x0003FFFF,0x20007FFC,0x20007FFF,0x400DFFFC,0x400DFFFF,0x400DFFFC,0x400DFFFF,0xFFFFFFFF
1821
#endif
22+
23+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_osis))
1924
/*
2025
ID Code
2126
Note: To lock and disable the debug interface define BSP_ID_CODE_LOCKED in compiler settings.
@@ -35,14 +40,12 @@ Please read the HWM for full details of the clearing process.
3540
#define BSP_CFG_ID_CODE_LONG_4 (0x00000000)
3641
#else
3742
/* ID Code: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */
38-
3943
#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF)
40-
4144
#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF)
42-
4345
#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF)
44-
4546
#define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF)
4647
#endif
4748
#define BSP_CFG_OPTION_SETTING_OSIS BSP_CFG_ID_CODE_LONG_1, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_2, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_3, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_4, 0xFFFFFFFF
49+
#endif /* option_setting_osis */
50+
4851
#endif /* BSP_MCU_OFS_CFG_H_ */

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e1/bsp_mcu_ofs_cfg.h

Lines changed: 26 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,29 +4,53 @@
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
66

7+
#include <zephyr/devicetree.h>
8+
79
#ifndef BSP_MCU_OFS_CFG_H_
810
#define BSP_MCU_OFS_CFG_H_
11+
12+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs0))
913
#define OFS_IWDT (0xA001A001 | 1 << 1 | 3 << 2 | 15 << 4 | 3 << 8 | 3 << 10 | 1 << 12 | 1 << 14)
1014
#define OFS_WDT (1 << 17 | 3 << 18 | 15 << 20 | 3 << 24 | 3 << 26 | 1 << 28 | 1 << 30)
1115
#define BSP_CFG_OPTION_SETTING_OFS0 (OFS_IWDT | OFS_WDT)
12-
#define BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
16+
#endif /* option_setting_ofs0 */
1317

18+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1))
19+
#define BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
1420
#define BSP_CFG_OPTION_SETTING_OFS1 ((uint32_t) BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
21+
#endif /* option_setting_ofs1 */
1522

23+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps))
1624
#define BSP_CFG_OPTION_SETTING_BPS 0xFFFFFFFF
25+
#endif /* option_setting_bps */
26+
27+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_pbps))
1728
#define BSP_CFG_OPTION_SETTING_PBPS 0xFFFFFFFF
18-
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
29+
#endif /* option_setting_pbps */
1930

31+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1_sec))
32+
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
2033
#define BSP_CFG_OPTION_SETTING_OFS1_SEC ((uint32_t) BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
34+
#endif /* option_setting_ofs1_sec */
2135

36+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps_sec))
2237
#define BSP_CFG_OPTION_SETTING_BPS_SEC 0xFFFFFFFF
38+
#endif /* option_setting_bps_sec */
39+
40+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_pbps_sec))
2341
#define BSP_CFG_OPTION_SETTING_PBPS_SEC 0xFFFFFFFF
42+
#endif /* option_setting_pbps_sec */
2443

44+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1_sel))
2545
#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
2646
#define BSP_CFG_OPTION_SETTING_OFS1_SEL (0xFFFFF8F8U | ((0U << 0U)) | ((0U << 2U)) | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0xF00 : 0U))
2747
#else
2848
#define BSP_CFG_OPTION_SETTING_OFS1_SEL (0xFFFFF8F8U)
2949
#endif
3050

51+
#endif /* option_setting_ofs1_sel */
52+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps_sel))
3153
#define BSP_CFG_OPTION_SETTING_BPS_SEL 0xFFFFFFFF
54+
#endif /* option_setting_bps_sel */
55+
3256
#endif /* BSP_MCU_OFS_CFG_H_ */

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e2/bsp_mcu_ofs_cfg.h

Lines changed: 17 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4,11 +4,18 @@
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
66

7+
#include <zephyr/devicetree.h>
8+
79
#ifndef BSP_MCU_OFS_CFG_H_
810
#define BSP_MCU_OFS_CFG_H_
11+
12+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs0))
913
#define OFS_IWDT (0xA001A001 | 1 << 1 | 3 << 2 | 15 << 4 | 3 << 8 | 3 << 10 | 1 << 12 | 1 << 14)
1014
#define OFS_WDT (1 << 17 | 3 << 18 | 15 << 20 | 3 << 24 | 3 << 26 | 1 << 28 | 1 << 30)
1115
#define BSP_CFG_OPTION_SETTING_OFS0 (OFS_IWDT | OFS_WDT)
16+
#endif /* option_setting_ofs0 */
17+
18+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_osis))
1219
/*
1320
ID Code
1421
Note: To permanently lock and disable the debug interface define the BSP_ID_CODE_PERMANENTLY_LOCKED in the compiler settings.
@@ -27,20 +34,25 @@ Please read the HWM for full details of the clearing process.
2734
#define BSP_CFG_ID_CODE_LONG_4 (0x00000000)
2835
#else
2936
/* ID Code: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */
30-
3137
#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF)
32-
3338
#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF)
34-
3539
#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF)
36-
3740
#define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF)
3841
#endif
3942
#define BSP_CFG_OPTION_SETTING_OSIS BSP_CFG_ID_CODE_LONG_1, BSP_CFG_ID_CODE_LONG_2, BSP_CFG_ID_CODE_LONG_3, BSP_CFG_ID_CODE_LONG_4
40-
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
43+
#endif /* option_setting_osis */
4144

45+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1))
46+
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
4247
#define BSP_CFG_OPTION_SETTING_OFS1_SEC ((uint32_t) BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
48+
#endif /* option_setting_ofs1 */
4349

50+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps_sec))
4451
#define BSP_CFG_OPTION_SETTING_BPS_SEC 0xFFFFFFFF
52+
#endif /* option_setting_bps_sec */
53+
54+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_pbps_sec))
4555
#define BSP_CFG_OPTION_SETTING_PBPS_SEC 0xFFFFFFFF
56+
#endif /* option_setting_pbps_sec */
57+
4658
#endif /* BSP_MCU_OFS_CFG_H_ */

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4l1/bsp_mcu_ofs_cfg.h

Lines changed: 37 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,35 +4,70 @@
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
66

7+
#include <zephyr/devicetree.h>
8+
79
#ifndef BSP_MCU_OFS_CFG_H_
810
#define BSP_MCU_OFS_CFG_H_
11+
12+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs0))
913
#define OFS_IWDT (0xA001A001 | 1 << 1 | 3 << 2 | 15 << 4 | 3 << 8 | 3 << 10 | 1 << 12 | 1 << 14)
1014
#define OFS_WDT (1 << 17 | 3 << 18 | 15 << 20 | 3 << 24 | 3 << 26 | 1 << 28 | 1 << 30)
1115
#define BSP_CFG_OPTION_SETTING_OFS0 (OFS_IWDT | OFS_WDT)
16+
#endif /* option_setting_ofs0 */
17+
1218
/* Dual Mode Select Register */
19+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_dualsel))
1320
#define BSP_CFG_OPTION_SETTING_DUALSEL (0xFFFFFFF8U | 0x7U)
14-
#define BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ (0xFFFFF0F8 | (1 <<2) | (2) | (1 << 8))
21+
#endif /* option_setting_dualsel */
1522

23+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1))
24+
#define BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ (0xFFFFF0F8 | (1 <<2) | (2) | (1 << 8))
1625
#define BSP_CFG_OPTION_SETTING_OFS1 ((uint32_t) BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
26+
#endif /* option_setting_ofs1 */
1727

28+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_banksel))
1829
#define BSP_CFG_OPTION_SETTING_BANKSEL ( 0xFFFFU | (0xFFFFU << 16))
30+
#endif /* option_setting_banksel */
31+
32+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps))
1933
#define BSP_CFG_OPTION_SETTING_BPS 0xFFFFFFFF,0xFFFFFFFF
34+
#endif /* option_setting_bps */
35+
36+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_pbps))
2037
#define BSP_CFG_OPTION_SETTING_PBPS 0xFFFFFFFF,0xFFFFFFFF
21-
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF0F8 | (1 <<2) | (2) | (1 << 8))
38+
#endif /* option_setting_pbps */
2239

40+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1_sec))
41+
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF0F8 | (1 <<2) | (2) | (1 << 8))
2342
#define BSP_CFG_OPTION_SETTING_OFS1_SEC ((uint32_t) BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
43+
#endif /* option_setting_ofs1_sec */
2444

45+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_banksel_sec))
2546
#define BSP_CFG_OPTION_SETTING_BANKSEL_SEC ( 0xFFFFU | (0xFFFFU << 16))
47+
#endif /* option_setting_banksel_sec */
48+
49+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps_sec))
2650
#define BSP_CFG_OPTION_SETTING_BPS_SEC 0xFFFFFFFF,0xFFFFFFFF
51+
#endif /* option_setting_bps_sec */
52+
53+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_pbps_sec))
2754
#define BSP_CFG_OPTION_SETTING_PBPS_SEC 0xFFFFFFFF,0xFFFFFFFF
55+
#endif /* option_setting_pbps_sec */
2856

57+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1_sel))
2958
#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
3059
#define BSP_CFG_OPTION_SETTING_OFS1_SEL (0xFFFFF0F8U | ((0U << 0U)) | ((0U << 2U)) | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0xF00 : 0U))
3160
#else
3261
#define BSP_CFG_OPTION_SETTING_OFS1_SEL (0xFFFFF0F8U)
3362
#endif
63+
#endif /* option_setting_ofs1_sel */
3464

3565
/* Security Attribution for Bank Select Register */
66+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_banksel_sel))
3667
#define BSP_CFG_OPTION_SETTING_BANKSEL_SEL (0xFFFFFFFFU)
68+
#endif /* option_setting_banksel_sel */
69+
70+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps_sel))
3771
#define BSP_CFG_OPTION_SETTING_BPS_SEL 0xFFFFFFFF,0xFFFFFFFF
72+
#endif /* option_setting_bps_sel */
3873
#endif /* BSP_MCU_OFS_CFG_H_ */

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m1/bsp_mcu_ofs_cfg.h

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,11 @@
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
66

7+
#include <zephyr/devicetree.h>
8+
79
#ifndef BSP_MCU_OFS_CFG_H_
810
#define BSP_MCU_OFS_CFG_H_
11+
912
#define OFS_IWDT (0xA001A001 | 1 << 1 | 3 << 2 | 15 << 4 | 3 << 8 | 3 << 10 | 1 << 12 | 1 << 14)
1013
#define OFS_WDT (1 << 17 | 3 << 18 | 15 << 20 | 3 << 24 | 3 << 26 | 1 << 28 | 1 << 30)
1114
#define BSP_CFG_OPTION_SETTING_OFS0 (OFS_IWDT | OFS_WDT)
@@ -16,6 +19,8 @@
1619
#ifndef BSP_CFG_OPTION_SETTING_SECMPU
1720
#define BSP_CFG_OPTION_SETTING_SECMPU 0x0003FFFC,0x0003FFFF,0x0003FFFC,0x0003FFFF,0x0003FFFC,0x0003FFFF,0x20007FFC,0x20007FFF,0x400DFFFC,0x400DFFFF,0x400DFFFC,0x400DFFFF,0xFFFFFFFF
1821
#endif
22+
23+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_osis))
1924
/*
2025
ID Code
2126
Note: To lock and disable the debug interface define BSP_ID_CODE_LOCKED in compiler settings.
@@ -35,14 +40,12 @@ Please read the HWM for full details of the clearing process.
3540
#define BSP_CFG_ID_CODE_LONG_4 (0x00000000)
3641
#else
3742
/* ID Code: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */
38-
3943
#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF)
40-
4144
#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF)
42-
4345
#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF)
44-
4546
#define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF)
4647
#endif
4748
#define BSP_CFG_OPTION_SETTING_OSIS BSP_CFG_ID_CODE_LONG_1, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_2, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_3, 0xFFFFFFFF, BSP_CFG_ID_CODE_LONG_4, 0xFFFFFFFF
49+
#endif /* option_setting_osis */
50+
4851
#endif /* BSP_MCU_OFS_CFG_H_ */

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m2/bsp_mcu_ofs_cfg.h

Lines changed: 26 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,29 +4,53 @@
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
66

7+
#include <zephyr/devicetree.h>
8+
79
#ifndef BSP_MCU_OFS_CFG_H_
810
#define BSP_MCU_OFS_CFG_H_
11+
12+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs0))
913
#define OFS_IWDT (0xA001A001 | 1 << 1 | 3 << 2 | 15 << 4 | 3 << 8 | 3 << 10 | 1 << 12 | 1 << 14)
1014
#define OFS_WDT (1 << 17 | 3 << 18 | 15 << 20 | 3 << 24 | 3 << 26 | 1 << 28 | 1 << 30)
1115
#define BSP_CFG_OPTION_SETTING_OFS0 (OFS_IWDT | OFS_WDT)
12-
#define BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
16+
#endif /* option_setting_ofs0 */
1317

18+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1))
19+
#define BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
1420
#define BSP_CFG_OPTION_SETTING_OFS1 ((uint32_t) BSP_CFG_OPTION_SETTING_OFS1_NO_HOCOFRQ | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
21+
#endif /* option_setting_ofs1 */
1522

23+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps))
1624
#define BSP_CFG_OPTION_SETTING_BPS 0xFFFFFFFF
25+
#endif /* option_setting_bps */
26+
27+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_pbps))
1728
#define BSP_CFG_OPTION_SETTING_PBPS 0xFFFFFFFF
18-
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
29+
#endif /* option_setting_pbps */
1930

31+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1_sec))
32+
#define BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ (0xFFFFF8F8 | (1 <<2) | (3) | (1 << 8))
2033
#define BSP_CFG_OPTION_SETTING_OFS1_SEC ((uint32_t) BSP_CFG_OPTION_SETTING_OFS1_SEC_NO_HOCOFRQ | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
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#endif /* option_setting_ofs1_sec */
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps_sec))
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#define BSP_CFG_OPTION_SETTING_BPS_SEC 0xFFFFFFFF
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#endif /* option_setting_bps_sec */
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_pbps_sec))
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#define BSP_CFG_OPTION_SETTING_PBPS_SEC 0xFFFFFFFF
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#endif /* option_setting_pbps_sec */
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_ofs1_sel))
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#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
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#define BSP_CFG_OPTION_SETTING_OFS1_SEL (0xFFFFF8F8U | ((0U << 0U)) | ((0U << 2U)) | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0xF00 : 0U))
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#else
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#define BSP_CFG_OPTION_SETTING_OFS1_SEL (0xFFFFF8F8U)
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#endif
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#endif /* option_setting_ofs1_sel */
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(option_setting_bps_sel))
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#define BSP_CFG_OPTION_SETTING_BPS_SEL 0xFFFFFFFF
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#endif /* option_setting_bps_sel */
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#endif /* BSP_MCU_OFS_CFG_H_ */

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