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Danh DoanKhiemNguyenT
Danh Doan
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KhiemNguyenT
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hal: renesas: ra: Initial support for display controller
Add commit to support these features: - Add support for r_glcdc - Add support for r_icu Signed-off-by: Danh Doan <[email protected]>
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‎drivers/ra/CMakeLists.txt

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@@ -59,6 +59,8 @@ zephyr_library_sources_ifdef(CONFIG_USE_RA_FSP_OSPI_B_NOR_FLASH
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fsp/src/r_ospi_b/r_ospi_b.c)
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zephyr_library_sources_ifdef(CONFIG_USE_RA_FSP_SDRAM
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fsp/src/bsp/mcu/all/bsp_sdram.c)
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zephyr_library_sources_ifdef(CONFIG_USE_RA_FSP_DISPLAY
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fsp/src/r_glcdc/r_glcdc.c)
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if(CONFIG_USE_RA_FSP_SCE)
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zephyr_include_directories(

‎drivers/ra/fsp/inc/api/r_display_api.h

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‎drivers/ra/fsp/inc/api/r_external_irq_api.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*******************************************************************************************************************//**
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* @ingroup RENESAS_INPUT_INTERFACES
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* @defgroup EXTERNAL_IRQ_API External IRQ Interface
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* @brief Interface for detecting external interrupts.
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*
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* @section EXTERNAL_IRQ_API_Summary Summary
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* The External IRQ Interface is for configuring interrupts to fire when a trigger condition is detected on an
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* external IRQ pin.
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*
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*
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* @{
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**********************************************************************************************************************/
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#ifndef R_EXTERNAL_IRQ_API_H
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#define R_EXTERNAL_IRQ_API_H
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/***********************************************************************************************************************
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* Includes
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**********************************************************************************************************************/
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/* Includes board and MCU related header files. */
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#include "bsp_api.h"
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/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
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FSP_HEADER
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/**********************************************************************************************************************
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* Macro definitions
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*********************************************************************************************************************/
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/*********************************************************************************************************************
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* Typedef definitions
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*********************************************************************************************************************/
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/** Callback function parameter data */
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typedef struct st_external_irq_callback_args
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{
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/** Placeholder for user data. Set in @ref external_irq_api_t::open function in @ref external_irq_cfg_t. */
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void const * p_context;
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uint32_t channel; ///< The physical hardware channel that caused the interrupt.
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} external_irq_callback_args_t;
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#ifndef BSP_OVERRIDE_EXTERNAL_IRQ_TRIGGER_T
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/** Condition that will trigger an interrupt when detected. */
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typedef enum e_external_irq_trigger
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{
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EXTERNAL_IRQ_TRIG_FALLING = 0, ///< Falling edge trigger
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EXTERNAL_IRQ_TRIG_RISING = 1, ///< Rising edge trigger
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EXTERNAL_IRQ_TRIG_BOTH_EDGE = 2, ///< Both edges trigger
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EXTERNAL_IRQ_TRIG_LEVEL_LOW = 3, ///< Low level trigger
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EXTERNAL_IRQ_TRIG_LEVEL_HIGH = 4 ///< High level trigger
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} external_irq_trigger_t;
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#endif
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#ifndef BSP_OVERRIDE_EXTERNAL_IRQ_PCLK_DIV_T
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/** External IRQ input pin digital filtering sample clock divisor settings. The digital filter rejects trigger
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* conditions that are shorter than 3 periods of the filter clock.
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*/
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typedef enum e_external_irq_clock_source_div
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{
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EXTERNAL_IRQ_CLOCK_SOURCE_DIV_1 = 0, ///< Filter using clock source divided by 1
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EXTERNAL_IRQ_CLOCK_SOURCE_DIV_8 = 1, ///< Filter using clock source divided by 8
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EXTERNAL_IRQ_CLOCK_SOURCE_DIV_32 = 2, ///< Filter using clock source divided by 32
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EXTERNAL_IRQ_CLOCK_SOURCE_DIV_64 = 3, ///< Filter using clock source divided by 64
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} external_irq_clock_source_div_t;
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#endif
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/** User configuration structure, used in open function */
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typedef struct st_external_irq_cfg
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{
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uint8_t channel; ///< Hardware channel used.
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uint8_t ipl; ///< Interrupt priority
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IRQn_Type irq; ///< Interrupt number assigned to this instance
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external_irq_trigger_t trigger; ///< Trigger setting.
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external_irq_clock_source_div_t clock_source_div; ///< Digital filter clock divisor setting.
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bool filter_enable; ///< Digital filter enable/disable setting.
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/** Callback provided external input trigger occurs. */
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void (* p_callback)(external_irq_callback_args_t * p_args);
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/** Placeholder for user data. Passed to the user callback in @ref external_irq_callback_args_t. */
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void const * p_context;
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void const * p_extend; ///< External IRQ hardware dependent configuration.
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} external_irq_cfg_t;
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/** External IRQ control block. Allocate an instance specific control block to pass into the external IRQ API calls.
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*/
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typedef void external_irq_ctrl_t;
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/** External interrupt driver structure. External interrupt functions implemented at the HAL layer will follow this API. */
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typedef struct st_external_irq_api
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{
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/** Initial configuration.
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*
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* @param[out] p_ctrl Pointer to control block. Must be declared by user. Value set here.
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* @param[in] p_cfg Pointer to configuration structure. All elements of the structure must be set by user.
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*/
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fsp_err_t (* open)(external_irq_ctrl_t * const p_ctrl, external_irq_cfg_t const * const p_cfg);
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/** Enable callback when an external trigger condition occurs.
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*
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* @param[in] p_ctrl Control block set in Open call for this external interrupt.
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*/
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fsp_err_t (* enable)(external_irq_ctrl_t * const p_ctrl);
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/** Disable callback when external trigger condition occurs.
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*
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* @param[in] p_ctrl Control block set in Open call for this external interrupt.
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*/
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fsp_err_t (* disable)(external_irq_ctrl_t * const p_ctrl);
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/**
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* Specify callback function and optional context pointer and working memory pointer.
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*
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* @param[in] p_ctrl Pointer to the External IRQ control block.
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* @param[in] p_callback Callback function
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* @param[in] p_context Pointer to send to callback function
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* @param[in] p_working_memory Pointer to volatile memory where callback structure can be allocated.
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* Callback arguments allocated here are only valid during the callback.
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*/
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fsp_err_t (* callbackSet)(external_irq_ctrl_t * const p_ctrl, void (* p_callback)(external_irq_callback_args_t *),
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void const * const p_context, external_irq_callback_args_t * const p_callback_memory);
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/** Allow driver to be reconfigured. May reduce power consumption.
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*
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* @param[in] p_ctrl Control block set in Open call for this external interrupt.
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*/
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fsp_err_t (* close)(external_irq_ctrl_t * const p_ctrl);
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} external_irq_api_t;
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/** This structure encompasses everything that is needed to use an instance of this interface. */
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typedef struct st_external_irq_instance
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{
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external_irq_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
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external_irq_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
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external_irq_api_t const * p_api; ///< Pointer to the API structure for this instance
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} external_irq_instance_t;
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/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
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FSP_FOOTER
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/*******************************************************************************************************************//**
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* @} (end defgroup EXTERNAL_IRQ_API)
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**********************************************************************************************************************/
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#endif

‎drivers/ra/fsp/inc/instances/r_glcdc.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*******************************************************************************************************************//**
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* @addtogroup GLCDC
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* @{
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**********************************************************************************************************************/
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#ifndef R_GLCDC_H
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#define R_GLCDC_H
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/***********************************************************************************************************************
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* Includes
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**********************************************************************************************************************/
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#include "bsp_api.h"
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#include "r_display_api.h"
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/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
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FSP_HEADER
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/***********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Typedef definitions
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**********************************************************************************************************************/
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/** Display control block. DO NOT INITIALIZE. */
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typedef struct st_glcdc_instance_ctrl
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{
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display_state_t state; // Status of GLCDC module
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/* Parameters to Event processing for display devices */
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void (* p_callback)(display_callback_args_t * p_args); // Pointer to callback function
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void const * p_context; // Pointer to the higher level device context
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const display_cfg_t * p_cfg; // Pointer to initial configurations
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} glcdc_instance_ctrl_t;
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/** Clock source select */
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typedef enum e_glcdc_clk_src
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{
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GLCDC_CLK_SRC_INTERNAL, ///< Internal
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GLCDC_CLK_SRC_EXTERNAL, ///< External
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} glcdc_clk_src_t;
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/** Clock frequency division ratio */
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typedef enum e_glcdc_panel_clk_div
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{
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GLCDC_PANEL_CLK_DIVISOR_1 = 1, ///< Division Ratio 1/1
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GLCDC_PANEL_CLK_DIVISOR_2 = 2, ///< Division Ratio 1/2
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GLCDC_PANEL_CLK_DIVISOR_3 = 3, ///< Division Ratio 1/3
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GLCDC_PANEL_CLK_DIVISOR_4 = 4, ///< Division Ratio 1/4
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GLCDC_PANEL_CLK_DIVISOR_5 = 5, ///< Division Ratio 1/5
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GLCDC_PANEL_CLK_DIVISOR_6 = 6, ///< Division Ratio 1/6
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GLCDC_PANEL_CLK_DIVISOR_7 = 7, ///< Division Ratio 1/7
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GLCDC_PANEL_CLK_DIVISOR_8 = 8, ///< Division Ratio 1/8
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GLCDC_PANEL_CLK_DIVISOR_9 = 9, ///< Division Ratio 1/9
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GLCDC_PANEL_CLK_DIVISOR_12 = 12, ///< Division Ratio 1/12
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GLCDC_PANEL_CLK_DIVISOR_16 = 16, ///< Division Ratio 1/16
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GLCDC_PANEL_CLK_DIVISOR_24 = 24, ///< Division Ratio 1/24
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GLCDC_PANEL_CLK_DIVISOR_32 = 32, ///< Division Ratio 1/32
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} glcdc_panel_clk_div_t;
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/** LCD TCON output pin select */
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typedef enum e_glcdc_tcon_pin
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{
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GLCDC_TCON_PIN_NONE = -1, ///< No output
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GLCDC_TCON_PIN_0, ///< LCD_TCON0
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GLCDC_TCON_PIN_1, ///< LCD_TCON1
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GLCDC_TCON_PIN_2, ///< LCD_TCON2
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GLCDC_TCON_PIN_3, ///< LCD_TCON3
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} glcdc_tcon_pin_t;
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/** Bus Arbitration setting */
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typedef enum e_glcdc_bus_arbitraion
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{
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GLCDC_BUS_ARBITRATION_ROUNDROBIN, ///< Round robin
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GLCDC_BUS_ARBITRATION_FIX_PRIORITY ///< Fixed
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} glcdc_bus_arbitration_t;
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/** Correction circuit sequence control */
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typedef enum e_glcdc_correction_proc_order
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{
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GLCDC_CORRECTION_PROC_ORDER_BRIGHTNESS_CONTRAST2GAMMA, ///< Brightness -> contrast -> gamma correction
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GLCDC_CORRECTION_PROC_ORDER_GAMMA2BRIGHTNESS_CONTRAST ///< Gamma correction -> brightness -> contrast
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} glcdc_correction_proc_order_t;
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/** Timing signals for driving the LCD panel */
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typedef enum e_glcdc_tcon_signal_select
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{
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GLCDC_TCON_SIGNAL_SELECT_STVA_VS = 0, ///< STVA/VS
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GLCDC_TCON_SIGNAL_SELECT_STVB_VE = 1, ///< STVB/VE
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GLCDC_TCON_SIGNAL_SELECT_STHA_HS = 2, ///< STH/SP/HS
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GLCDC_TCON_SIGNAL_SELECT_STHB_HE = 3, ///< STB/LP/HE
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GLCDC_TCON_SIGNAL_SELECT_DE = 7 ///< DE
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} glcdc_tcon_signal_select_t;
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/** Clock phase adjustment for serial RGB output */
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typedef enum e_glcdc_clut_plane
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{
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GLCDC_CLUT_PLANE_0 = 0, ///< GLCDC CLUT plane 0
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GLCDC_CLUT_PLANE_1 = 1, ///< GLCDC CLUT plane 1
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} glcdc_clut_plane_t;
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/** Dithering mode */
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typedef enum e_glcdc_dithering_mode
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{
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GLCDC_DITHERING_MODE_TRUNCATE = 0, ///< No dithering (truncate)
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GLCDC_DITHERING_MODE_ROUND_OFF = 1, ///< Dithering with round off
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GLCDC_DITHERING_MODE_2X2PATTERN = 2, ///< Dithering with 2x2 pattern
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GLCDC_DITHERING_MODE_SETTING_MAX
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} glcdc_dithering_mode_t;
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/** Dithering mode */
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typedef enum e_glcdc_dithering_pattern
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{
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GLCDC_DITHERING_PATTERN_00 = 0, ///< 2x2 pattern '00'
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GLCDC_DITHERING_PATTERN_01 = 1, ///< 2x2 pattern '01'
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GLCDC_DITHERING_PATTERN_10 = 2, ///< 2x2 pattern '10'
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GLCDC_DITHERING_PATTERN_11 = 3, ///< 2x2 pattern '11'
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} glcdc_dithering_pattern_t;
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/** Output interface format */
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typedef enum e_glcdc_input_interface_format
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{
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GLCDC_INPUT_INTERFACE_FORMAT_RGB565 = 0, ///< Input interface format RGB565
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GLCDC_INPUT_INTERFACE_FORMAT_RGB888 = 1, ///< Input interface format RGB888
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GLCDC_INPUT_INTERFACE_FORMAT_ARGB1555 = 2, ///< Input interface format ARGB1555
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GLCDC_INPUT_INTERFACE_FORMAT_ARGB4444 = 3, ///< Input interface format ARGB4444
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GLCDC_INPUT_INTERFACE_FORMAT_ARGB8888 = 4, ///< Input interface format ARGB8888
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GLCDC_INPUT_INTERFACE_FORMAT_CLUT8 = 5, ///< Input interface format CLUT8
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GLCDC_INPUT_INTERFACE_FORMAT_CLUT4 = 6, ///< Input interface format CLUT4
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GLCDC_INPUT_INTERFACE_FORMAT_CLUT1 = 7, ///< Input interface format CLUT1
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} glcdc_input_interface_format_t;
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/** Output interface format */
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typedef enum e_glcdc_output_interface_format
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{
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GLCDC_OUTPUT_INTERFACE_FORMAT_RGB888 = 0, ///< Output interface format RGB888
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GLCDC_OUTPUT_INTERFACE_FORMAT_RGB666 = 1, ///< Output interface format RGB666
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GLCDC_OUTPUT_INTERFACE_FORMAT_RGB565 = 2, ///< Output interface format RGB565
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GLCDC_OUTPUT_INTERFACE_FORMAT_SERIAL_RGB = 3, ///< Output interface format Serial RGB
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} glcdc_output_interface_format_t;
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/** Dithering output format */
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typedef enum e_glcdc_dithering_output_format
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{
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GLCDC_DITHERING_OUTPUT_FORMAT_RGB888 = 0, ///< Dithering output format RGB888
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GLCDC_DITHERING_OUTPUT_FORMAT_RGB666 = 1, ///< Dithering output format RGB666
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GLCDC_DITHERING_OUTPUT_FORMAT_RGB565 = 2, ///< Dithering output format RGB565
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} glcdc_dithering_output_format_t;
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/** GLCDC hardware specific configuration */
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typedef struct st_glcdc_extended_cfg
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{
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glcdc_tcon_pin_t tcon_hsync; ///< GLCDC TCON output pin select
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glcdc_tcon_pin_t tcon_vsync; ///< GLCDC TCON output pin select
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glcdc_tcon_pin_t tcon_de; ///< GLCDC TCON output pin select
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glcdc_correction_proc_order_t correction_proc_order; ///< Correction control route select
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glcdc_clk_src_t clksrc; ///< Clock Source selection
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glcdc_panel_clk_div_t clock_div_ratio; ///< Clock divide ratio for dot clock
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glcdc_dithering_mode_t dithering_mode; ///< Dithering mode
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glcdc_dithering_pattern_t dithering_pattern_A; ///< Dithering pattern A
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glcdc_dithering_pattern_t dithering_pattern_B; ///< Dithering pattern B
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glcdc_dithering_pattern_t dithering_pattern_C; ///< Dithering pattern C
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glcdc_dithering_pattern_t dithering_pattern_D; ///< Dithering pattern D
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void * phy_layer; ///< Alternate PHY layer, such as MIPI DSI.
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} glcdc_extended_cfg_t;
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/* GLCDC hardware specific control block */
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typedef struct st_glcdc_ctrl
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{
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display_coordinate_t back_porch; ///< Zero coordinate for graphics plane(Back porch end)
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uint16_t hsize; ///< Horizontal pixel size in a line
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uint16_t vsize; ///< Vertical pixel size in a frame
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void * p_context; ///< Pointer to the function level device context
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// (e.g. display_ctrl_t type data)
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} glcdc_ctrl_t;
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/**********************************************************************************************************************
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* Exported global variables
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**********************************************************************************************************************/
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/* @cond INC_HEADER_DEFS_SEC */
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/* Filled in Interface API structure for this Instance. */
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extern const display_api_t g_display_on_glcdc;
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/* @endcond */
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/**********************************************************************************************************************
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* Public APIs
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**********************************************************************************************************************/
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fsp_err_t R_GLCDC_Open(display_ctrl_t * const p_api_ctrl, display_cfg_t const * const p_cfg);
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fsp_err_t R_GLCDC_Close(display_ctrl_t * const p_api_ctrl);
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fsp_err_t R_GLCDC_Start(display_ctrl_t * const p_api_ctrl);
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fsp_err_t R_GLCDC_Stop(display_ctrl_t * const p_api_ctrl);
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fsp_err_t R_GLCDC_LayerChange(display_ctrl_t const * const p_api_ctrl,
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display_runtime_cfg_t const * const p_cfg,
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display_frame_layer_t layer);
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fsp_err_t R_GLCDC_BufferChange(display_ctrl_t const * const p_api_ctrl,
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uint8_t * const framebuffer,
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display_frame_layer_t layer);
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fsp_err_t R_GLCDC_ColorCorrection(display_ctrl_t const * const p_api_ctrl,
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display_correction_t const * const p_correction);
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fsp_err_t R_GLCDC_ClutUpdate(display_ctrl_t const * const p_api_ctrl,
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display_clut_cfg_t const * const p_clut_cfg,
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display_frame_layer_t layer);
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fsp_err_t R_GLCDC_ClutEdit(display_ctrl_t const * const p_api_ctrl,
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display_frame_layer_t layer,
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uint8_t index,
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uint32_t color);
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fsp_err_t R_GLCDC_ColorKeySet(display_ctrl_t const * const p_api_ctrl,
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display_colorkeying_layer_t key_cfg,
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display_frame_layer_t layer);
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fsp_err_t R_GLCDC_StatusGet(display_ctrl_t const * const p_api_ctrl, display_status_t * const status);
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/*******************************************************************************************************************//**
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* @} (end defgroup GLCDC)
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**********************************************************************************************************************/
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/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
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FSP_FOOTER
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#endif

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