Handle gen script rendering template exception and correct RTS/CTS pin configuration in DTSI

[GeorgeCGV]

The genpinctrl.py is corrected with a patch proposed by @mathieuchopstm that handles template exceptions raised by the C0 family.

The DTSI files are regenerated with pin open data f4ec11, that removes: stm32wba50keux, modifies others, and adds some new ones.

A correction to RTS/CTS serial pins is added:

• CTS
  • remove open-drain
• RTS
  • replace open-drain with push-pull
  • remove pull-up bias

Such configuration shall support most use cases and provide faster RTS switching.

The DTSI files are regenerated again to include RTS/CTS configuration changes.

[mathieuchopstm]

Minor commit-related requests:

• please change first regeneration commit's title from dts: st: regenerate all dtsi files to dts: st: regenerate all dtsi files with latest pindata
• remove the skipped files list from genpinctrl commit's message
  • move it to dts: st: regenerate all dtsi files with latest pindata instead - with a header like The following SoCs are skipped due to incompatibility with genpinctrl:
  • I would also make the genpinctrl commit message more generic, something like:

The latest STM32 Open Pin Data revision contains SoC descriptors that
are not handled properly by genpinctrl yet. These files are parsed
properly but trigger an exception during the pinctrl template rendering.

Add exception logic around template rendering so that problematic SoC files
are skipped - with an error message - instead of crashing the script, which
would otherwise prevent regeneration of DTSI for *all* SoCs.

This allows us to keep updating the pinctrl DTSI for supported SoCs
even when new SoCs requiring genpinctrl updates are added to Pin Data.

Otherwise LGTM.

[erwango]

@GeorgeCGV Would you mind rebasing ?

[GeorgeCGV]

@erwango @mathieuchopstm rebased and re-generated with currently used open pin data 3e9ade (removes stm32wba50keux).

Generation output:

Unexpected AF format: GPIO_AF2_rf (ip: STM32WL33_gpio_v1_0)
Skipping unsupported family STM32MP2.
Skipping unsupported family STM32N6.
Skipping unsupported family STM32U3.
Skipping unsupported family STM32WL3.