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stm32cube: stm32fx: remove phy init and config #300

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a888537
stm32cube: stm32f1: remove phy init and config
maass-hamburg Aug 1, 2025
1819c77
stm32cube: stm32f2: remove phy init and config
maass-hamburg Aug 1, 2025
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7 changes: 7 additions & 0 deletions stm32cube/stm32f1xx/README
View file
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Original file line number Diff line number Diff line change
Expand Up @@ -56,4 +56,11 @@ Patch List:
Impacted files:
drivers/include/Legacy/stm32_hal_legacy.h

*stm32cube: stm32f1: remove phy init and config
remove phy init and config as that is already
done in zephyr before and we don't want it to
be overwritten
Impacted files:
drivers/src/stm32f1xx_hal_eth.c

See release_note.html from STM32Cube
160 changes: 0 additions & 160 deletions stm32cube/stm32f1xx/drivers/src/stm32f1xx_hal_eth.c
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Original file line number Diff line number Diff line change
Expand Up @@ -306,166 +306,6 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
(heth->Instance)->MACMIIAR = (uint32_t)tmpreg1;

/*-------------------- PHY initialization and configuration ----------------*/
/* Put the PHY in reset mode */
if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Delay to assure PHY reset */
HAL_Delay(PHY_RESET_DELAY);

if ((heth->Init).AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE)
{
/* Get tick */
tickstart = HAL_GetTick();

/* We wait for linked status */
do
{
HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);

/* Check for the Timeout */
if ((HAL_GetTick() - tickstart) > ETH_TIMEOUT_LINKED_STATE)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

heth->State = HAL_ETH_STATE_READY;

/* Process Unlocked */
__HAL_UNLOCK(heth);

return HAL_TIMEOUT;
}
}
while (((phyreg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS));


/* Enable Auto-Negotiation */
if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_AUTONEGOTIATION)) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Get tick */
tickstart = HAL_GetTick();

/* Wait until the auto-negotiation will be completed */
do
{
HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);

/* Check for the Timeout */
if ((HAL_GetTick() - tickstart) > ETH_TIMEOUT_AUTONEGO_COMPLETED)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

heth->State = HAL_ETH_STATE_READY;

/* Process Unlocked */
__HAL_UNLOCK(heth);

return HAL_TIMEOUT;
}

}
while (((phyreg & PHY_AUTONEGO_COMPLETE) != PHY_AUTONEGO_COMPLETE));

/* Read the result of the auto-negotiation */
if ((HAL_ETH_ReadPHYRegister(heth, PHY_SR, &phyreg)) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */
if ((phyreg & PHY_DUPLEX_STATUS) != (uint32_t)RESET)
{
/* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */
(heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX;
}
else
{
/* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */
(heth->Init).DuplexMode = ETH_MODE_HALFDUPLEX;
}
/* Configure the MAC with the speed fixed by the auto-negotiation process */
if ((phyreg & PHY_SPEED_STATUS) == PHY_SPEED_STATUS)
{
/* Set Ethernet speed to 10M following the auto-negotiation */
(heth->Init).Speed = ETH_SPEED_10M;
}
else
{
/* Set Ethernet speed to 100M following the auto-negotiation */
(heth->Init).Speed = ETH_SPEED_100M;
}
}
else /* AutoNegotiation Disable */
{
/* Check parameters */
assert_param(IS_ETH_SPEED(heth->Init.Speed));
assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode));

/* Set MAC Speed and Duplex Mode */
if (HAL_ETH_WritePHYRegister(heth, PHY_BCR, ((uint16_t)((heth->Init).DuplexMode >> 3U) |
(uint16_t)((heth->Init).Speed >> 1U))) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Delay to assure PHY configuration */
HAL_Delay(PHY_CONFIG_DELAY);
}

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

Expand Down
7 changes: 7 additions & 0 deletions stm32cube/stm32f2xx/README
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -56,4 +56,11 @@ Patch List:
Impacted files:
drivers/include/Legacy/stm32_hal_legacy.h

*stm32cube: stm32f2: remove phy init and config
remove phy init and config as that is already
done in zephyr before and we don't want it to
be overwritten
Impacted files:
drivers/src/stm32f2xx_hal_eth.c

See release_note.html from STM32Cube
160 changes: 0 additions & 160 deletions stm32cube/stm32f2xx/drivers/src/stm32f2xx_hal_eth.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -312,166 +312,6 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
(heth->Instance)->MACMIIAR = (uint32_t)tmpreg1;

/*-------------------- PHY initialization and configuration ----------------*/
/* Put the PHY in reset mode */
if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Delay to assure PHY reset */
HAL_Delay(PHY_RESET_DELAY);

if ((heth->Init).AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE)
{
/* Get tick */
tickstart = HAL_GetTick();

/* We wait for linked status */
do
{
HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);

/* Check for the Timeout */
if ((HAL_GetTick() - tickstart) > ETH_TIMEOUT_LINKED_STATE)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

heth->State = HAL_ETH_STATE_READY;

/* Process Unlocked */
__HAL_UNLOCK(heth);

return HAL_TIMEOUT;
}
}
while (((phyreg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS));


/* Enable Auto-Negotiation */
if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_AUTONEGOTIATION)) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Get tick */
tickstart = HAL_GetTick();

/* Wait until the auto-negotiation will be completed */
do
{
HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);

/* Check for the Timeout */
if ((HAL_GetTick() - tickstart) > ETH_TIMEOUT_AUTONEGO_COMPLETED)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

heth->State = HAL_ETH_STATE_READY;

/* Process Unlocked */
__HAL_UNLOCK(heth);

return HAL_TIMEOUT;
}

}
while (((phyreg & PHY_AUTONEGO_COMPLETE) != PHY_AUTONEGO_COMPLETE));

/* Read the result of the auto-negotiation */
if ((HAL_ETH_ReadPHYRegister(heth, PHY_SR, &phyreg)) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */
if ((phyreg & PHY_DUPLEX_STATUS) != (uint32_t)RESET)
{
/* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */
(heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX;
}
else
{
/* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */
(heth->Init).DuplexMode = ETH_MODE_HALFDUPLEX;
}
/* Configure the MAC with the speed fixed by the auto-negotiation process */
if ((phyreg & PHY_SPEED_STATUS) == PHY_SPEED_STATUS)
{
/* Set Ethernet speed to 10M following the auto-negotiation */
(heth->Init).Speed = ETH_SPEED_10M;
}
else
{
/* Set Ethernet speed to 100M following the auto-negotiation */
(heth->Init).Speed = ETH_SPEED_100M;
}
}
else /* AutoNegotiation Disable */
{
/* Check parameters */
assert_param(IS_ETH_SPEED(heth->Init.Speed));
assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode));

/* Set MAC Speed and Duplex Mode */
if (HAL_ETH_WritePHYRegister(heth, PHY_BCR, ((uint16_t)((heth->Init).DuplexMode >> 3) |
(uint16_t)((heth->Init).Speed >> 1))) != HAL_OK)
{
/* In case of write timeout */
err = ETH_ERROR;

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

/* Set the ETH peripheral state to READY */
heth->State = HAL_ETH_STATE_READY;

/* Return HAL_ERROR */
return HAL_ERROR;
}

/* Delay to assure PHY configuration */
HAL_Delay(PHY_CONFIG_DELAY);
}

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);

Expand Down