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42 | 42 | min-residency-us = <200>;
|
43 | 43 | exit-latency-us = <100>;
|
44 | 44 | };
|
| 45 | + |
45 | 46 | /* PM_STATE_SOFT_OFF can be entered only by calling pm_state_force.
|
46 | 47 | * The procedure is triggered by IPC from the HOST (SET_DX).
|
47 | 48 | */
|
|
110 | 111 | };
|
111 | 112 |
|
112 | 113 | soc {
|
113 |
| - |
114 | 114 | l1ccap: l1ccap@1fe80080 {
|
115 | 115 | compatible = "intel,adsp-l1ccap";
|
116 | 116 | reg = <0x1fe80080 0x4>;
|
|
286 | 286 | #size-cells = <0>;
|
287 | 287 | compatible = "intel,ssp";
|
288 | 288 | reg = <0x00028000 0x1000
|
289 |
| - 0x00079C00 0x200>; |
| 289 | + 0x00079C00 0x200>; |
290 | 290 | interrupts = <0x00 0 0>;
|
291 | 291 | interrupt-parent = <&ace_intc>;
|
292 | 292 | dmas = <&lpgpdma0 2
|
293 |
| - &lpgpdma0 3>; |
| 293 | + &lpgpdma0 3>; |
294 | 294 | dma-names = "tx", "rx";
|
295 | 295 | ssp-index = <0>;
|
296 | 296 | status = "okay";
|
|
309 | 309 | #address-cells = <1>;
|
310 | 310 | #size-cells = <0>;
|
311 | 311 | reg = <0x00029000 0x1000
|
312 |
| - 0x00079C00 0x200>; |
| 312 | + 0x00079C00 0x200>; |
313 | 313 | interrupts = <0x01 0 0>;
|
314 | 314 | interrupt-parent = <&ace_intc>;
|
315 | 315 | dmas = <&lpgpdma0 4
|
316 |
| - &lpgpdma0 5>; |
| 316 | + &lpgpdma0 5>; |
317 | 317 | dma-names = "tx", "rx";
|
318 | 318 | ssp-index = <1>;
|
319 | 319 | status = "okay";
|
|
332 | 332 | #address-cells = <1>;
|
333 | 333 | #size-cells = <0>;
|
334 | 334 | reg = <0x0002a000 0x1000
|
335 |
| - 0x00079C00 0x200>; |
| 335 | + 0x00079C00 0x200>; |
336 | 336 | interrupts = <0x02 0 0>;
|
337 | 337 | interrupt-parent = <&ace_intc>;
|
338 | 338 | dmas = <&lpgpdma0 6
|
339 |
| - &lpgpdma0 7>; |
| 339 | + &lpgpdma0 7>; |
340 | 340 | dma-names = "tx", "rx";
|
341 | 341 | ssp-index = <2>;
|
342 | 342 | status = "okay";
|
|
399 | 399 | bit-position = <15>;
|
400 | 400 | #power-domain-cells = <0>;
|
401 | 401 | };
|
| 402 | + |
402 | 403 | ml1_domain: ml1_domain {
|
403 | 404 | compatible = "intel,adsp-power-domain";
|
404 | 405 | bit-position = <13>;
|
405 | 406 | #power-domain-cells = <0>;
|
406 | 407 | };
|
| 408 | + |
407 | 409 | ml0_domain: ml0_domain {
|
408 | 410 | compatible = "intel,adsp-power-domain";
|
409 | 411 | bit-position = <12>;
|
410 | 412 | #power-domain-cells = <0>;
|
411 | 413 | };
|
| 414 | + |
412 | 415 | io3_domain: io3_domain {
|
413 | 416 | compatible = "intel,adsp-power-domain";
|
414 | 417 | bit-position = <11>;
|
415 | 418 | #power-domain-cells = <0>;
|
416 | 419 | };
|
| 420 | + |
417 | 421 | io2_domain: io2_domain {
|
418 | 422 | compatible = "intel,adsp-power-domain";
|
419 | 423 | bit-position = <10>;
|
420 | 424 | #power-domain-cells = <0>;
|
421 | 425 | };
|
| 426 | + |
422 | 427 | io1_domain: io1_domain {
|
423 | 428 | compatible = "intel,adsp-power-domain";
|
424 | 429 | bit-position = <9>;
|
425 | 430 | #power-domain-cells = <0>;
|
426 | 431 | };
|
| 432 | + |
427 | 433 | io0_domain: io0_domain {
|
428 | 434 | compatible = "intel,adsp-power-domain";
|
429 | 435 | bit-position = <8>;
|
430 | 436 | #power-domain-cells = <0>;
|
431 | 437 | };
|
| 438 | + |
432 | 439 | hub_hp_domain: hub_hp_domain {
|
433 | 440 | compatible = "intel,adsp-power-domain";
|
434 | 441 | bit-position = <6>;
|
435 | 442 | #power-domain-cells = <0>;
|
436 | 443 | };
|
| 444 | + |
437 | 445 | hst_domain: hst_domain {
|
438 | 446 | compatible = "intel,adsp-power-domain";
|
439 | 447 | bit-position = <4>;
|
|
544 | 552 | * masking layer makes it easier for MTL to handle
|
545 | 553 | * this internally.
|
546 | 554 | */
|
547 |
| - ace_intc: ace_intc@7ac00 { |
| 555 | + ace_intc: ace_intc@7ac00 { |
548 | 556 | compatible = "intel,ace-intc";
|
549 | 557 | reg = <0x7ac00 0xc00>;
|
550 | 558 | interrupt-controller;
|
|
606 | 614 | reg = <0x17e000 0x1000>;
|
607 | 615 | paddr-size = <12>;
|
608 | 616 | exec-bit-idx = <14>;
|
609 |
| - write-bit-idx= <15>; |
| 617 | + write-bit-idx = <15>; |
610 | 618 | };
|
611 | 619 |
|
612 | 620 | timer: timer {
|
|
626 | 634 | status = "okay";
|
627 | 635 | reg = <0>;
|
628 | 636 | };
|
| 637 | + |
629 | 638 | hda1: hda@1 {
|
630 | 639 | compatible = "intel,hda-dai";
|
631 | 640 | power-domains = <&io0_domain>;
|
632 | 641 | zephyr,pm-device-runtime-auto;
|
633 | 642 | status = "okay";
|
634 | 643 | reg = <1>;
|
635 | 644 | };
|
| 645 | + |
636 | 646 | hda2: hda@2 {
|
637 | 647 | compatible = "intel,hda-dai";
|
638 | 648 | power-domains = <&io0_domain>;
|
639 | 649 | zephyr,pm-device-runtime-auto;
|
640 | 650 | status = "okay";
|
641 | 651 | reg = <2>;
|
642 | 652 | };
|
| 653 | + |
643 | 654 | hda3: hda@3 {
|
644 | 655 | compatible = "intel,hda-dai";
|
645 | 656 | power-domains = <&io0_domain>;
|
646 | 657 | zephyr,pm-device-runtime-auto;
|
647 | 658 | status = "okay";
|
648 | 659 | reg = <3>;
|
649 | 660 | };
|
| 661 | + |
650 | 662 | hda4: hda@4 {
|
651 | 663 | compatible = "intel,hda-dai";
|
652 | 664 | power-domains = <&io0_domain>;
|
653 | 665 | zephyr,pm-device-runtime-auto;
|
654 | 666 | status = "okay";
|
655 | 667 | reg = <4>;
|
656 | 668 | };
|
| 669 | + |
657 | 670 | hda5: hda@5 {
|
658 | 671 | compatible = "intel,hda-dai";
|
659 | 672 | power-domains = <&io0_domain>;
|
660 | 673 | zephyr,pm-device-runtime-auto;
|
661 | 674 | status = "okay";
|
662 | 675 | reg = <5>;
|
663 | 676 | };
|
| 677 | + |
664 | 678 | hda6: hda@6 {
|
665 | 679 | compatible = "intel,hda-dai";
|
666 | 680 | power-domains = <&io0_domain>;
|
667 | 681 | zephyr,pm-device-runtime-auto;
|
668 | 682 | status = "okay";
|
669 | 683 | reg = <6>;
|
670 | 684 | };
|
| 685 | + |
671 | 686 | hda7: hda@7 {
|
672 | 687 | compatible = "intel,hda-dai";
|
673 | 688 | power-domains = <&io0_domain>;
|
674 | 689 | zephyr,pm-device-runtime-auto;
|
675 | 690 | status = "okay";
|
676 | 691 | reg = <7>;
|
677 | 692 | };
|
| 693 | + |
678 | 694 | hda8: hda@8 {
|
679 | 695 | compatible = "intel,hda-dai";
|
680 | 696 | power-domains = <&io0_domain>;
|
681 | 697 | zephyr,pm-device-runtime-auto;
|
682 | 698 | status = "okay";
|
683 | 699 | reg = <8>;
|
684 | 700 | };
|
| 701 | + |
685 | 702 | hda9: hda@9 {
|
686 | 703 | compatible = "intel,hda-dai";
|
687 | 704 | power-domains = <&io0_domain>;
|
688 | 705 | zephyr,pm-device-runtime-auto;
|
689 | 706 | status = "okay";
|
690 | 707 | reg = <9>;
|
691 | 708 | };
|
| 709 | + |
692 | 710 | hda10: hda@a {
|
693 | 711 | compatible = "intel,hda-dai";
|
694 | 712 | power-domains = <&io0_domain>;
|
695 | 713 | zephyr,pm-device-runtime-auto;
|
696 | 714 | status = "okay";
|
697 | 715 | reg = <0x0a>;
|
698 | 716 | };
|
| 717 | + |
699 | 718 | hda11: hda@b {
|
700 | 719 | compatible = "intel,hda-dai";
|
701 | 720 | power-domains = <&io0_domain>;
|
702 | 721 | zephyr,pm-device-runtime-auto;
|
703 | 722 | status = "okay";
|
704 | 723 | reg = <0x0b>;
|
705 | 724 | };
|
| 725 | + |
706 | 726 | hda12: hda@c {
|
707 | 727 | compatible = "intel,hda-dai";
|
708 | 728 | power-domains = <&io0_domain>;
|
709 | 729 | zephyr,pm-device-runtime-auto;
|
710 | 730 | status = "okay";
|
711 | 731 | reg = <0x0c>;
|
712 | 732 | };
|
| 733 | + |
713 | 734 | hda13: hda@d {
|
714 | 735 | compatible = "intel,hda-dai";
|
715 | 736 | power-domains = <&io0_domain>;
|
716 | 737 | zephyr,pm-device-runtime-auto;
|
717 | 738 | status = "okay";
|
718 | 739 | reg = <0x0d>;
|
719 | 740 | };
|
| 741 | + |
720 | 742 | hda14: hda@e {
|
721 | 743 | compatible = "intel,hda-dai";
|
722 | 744 | power-domains = <&io0_domain>;
|
723 | 745 | zephyr,pm-device-runtime-auto;
|
724 | 746 | status = "okay";
|
725 | 747 | reg = <0x0e>;
|
726 | 748 | };
|
| 749 | + |
727 | 750 | hda15: hda@f {
|
728 | 751 | compatible = "intel,hda-dai";
|
729 | 752 | power-domains = <&io0_domain>;
|
730 | 753 | zephyr,pm-device-runtime-auto;
|
731 | 754 | status = "okay";
|
732 | 755 | reg = <0x0f>;
|
733 | 756 | };
|
| 757 | + |
734 | 758 | hda16: hda@10 {
|
735 | 759 | compatible = "intel,hda-dai";
|
736 | 760 | power-domains = <&io0_domain>;
|
737 | 761 | zephyr,pm-device-runtime-auto;
|
738 | 762 | status = "okay";
|
739 | 763 | reg = <0x10>;
|
740 | 764 | };
|
| 765 | + |
741 | 766 | hda17: hda@11 {
|
742 | 767 | compatible = "intel,hda-dai";
|
743 | 768 | power-domains = <&io0_domain>;
|
744 | 769 | zephyr,pm-device-runtime-auto;
|
745 | 770 | status = "okay";
|
746 | 771 | reg = <0x11>;
|
747 | 772 | };
|
| 773 | + |
748 | 774 | hda18: hda@12 {
|
749 | 775 | compatible = "intel,hda-dai";
|
750 | 776 | power-domains = <&io0_domain>;
|
|
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