dts: arm: st: stm32wba: remove U suffix from "clocks" in DTSI

PR 79683 added unnecessary U suffix to constants in DTSI.
This bloats the files for no reason and is starting to spread as people
use the DTSI for reference in other places, and so copy this bad pattern.

Remove the useless U suffixes in DTSI files for this series.

Signed-off-by: Mathieu Choplain <[email protected]>

Author: Mathieu Choplain

dts/arm/st/wba/stm32wba.dtsi

@@ -250,39 +250,39 @@
 				gpio-controller;
 				#gpio-cells = <2>;
 				reg = <0x42020000 0x400>;
-				clocks = <&rcc STM32_CLOCK(AHB2, 0U)>;
+				clocks = <&rcc STM32_CLOCK(AHB2, 0)>;
 			};
 
 			gpiob: gpio@42020400 {
 				compatible = "st,stm32-gpio";
 				gpio-controller;
 				#gpio-cells = <2>;
 				reg = <0x42020400 0x400>;
-				clocks = <&rcc STM32_CLOCK(AHB2, 1U)>;
+				clocks = <&rcc STM32_CLOCK(AHB2, 1)>;
 			};
 
 			gpioc: gpio@42020800 {
 				compatible = "st,stm32-gpio";
 				gpio-controller;
 				#gpio-cells = <2>;
 				reg = <0x42020800 0x400>;
-				clocks = <&rcc STM32_CLOCK(AHB2, 2U)>;
+				clocks = <&rcc STM32_CLOCK(AHB2, 2)>;
 			};
 
 			gpioh: gpio@42021c00 {
 				compatible = "st,stm32-gpio";
 				gpio-controller;
 				#gpio-cells = <2>;
 				reg = <0x42021c00 0x400>;
-				clocks = <&rcc STM32_CLOCK(AHB2, 7U)>;
+				clocks = <&rcc STM32_CLOCK(AHB2, 7)>;
 			};
 		};
 
 		rtc: rtc@46007800 {
 			compatible = "st,stm32-rtc";
 			reg = <0x46007800 0x400>;
 			interrupts = <2 0>;
-			clocks = <&rcc STM32_CLOCK(APB7, 21U)>;
+			clocks = <&rcc STM32_CLOCK(APB7, 21)>;
 			alarms-count = <2>;
 			status = "disabled";
 		};
@@ -296,15 +296,15 @@
 		wwdg: watchdog@40002c00 {
 			compatible = "st,stm32-window-watchdog";
 			reg = <0x40002C00 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB1, 11U)>;
+			clocks = <&rcc STM32_CLOCK(APB1, 11)>;
 			interrupts = <0 7>;
 			status = "disabled";
 		};
 
 		usart1: serial@40013800 {
 			compatible = "st,stm32-usart", "st,stm32-uart";
 			reg = <0x40013800 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB2, 14U)>;
+			clocks = <&rcc STM32_CLOCK(APB2, 14)>;
 			resets = <&rctl STM32_RESET(APB2, 14U)>;
 			interrupts = <46 0>;
 			status = "disabled";
@@ -313,7 +313,7 @@
 		usart2: serial@40004400 {
 			compatible = "st,stm32-usart", "st,stm32-uart";
 			reg = <0x40004400 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB1, 17U)>;
+			clocks = <&rcc STM32_CLOCK(APB1, 17)>;
 			resets = <&rctl STM32_RESET(APB1L, 17U)>;
 			interrupts = <47 0>;
 			status = "disabled";
@@ -322,7 +322,7 @@
 		lpuart1: serial@46002400 {
 			compatible = "st,stm32-lpuart", "st,stm32-uart";
 			reg = <0x46002400 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB7, 6U)>;
+			clocks = <&rcc STM32_CLOCK(APB7, 6)>;
 			resets = <&rctl STM32_RESET(APB7, 6U)>;
 			interrupts = <48 0>;
 			status = "disabled";
@@ -334,7 +334,7 @@
 			#size-cells = <0>;
 			reg = <0x40013000 0x400>;
 			interrupts = <45 5>;
-			clocks = <&rcc STM32_CLOCK(APB2, 12U)>;
+			clocks = <&rcc STM32_CLOCK(APB2, 12)>;
 			status = "disabled";
 		};
 
@@ -344,7 +344,7 @@
 			#size-cells = <0>;
 			reg = <0x46002000 0x400>;
 			interrupts = <63 5>;
-			clocks = <&rcc STM32_CLOCK(APB7, 5U)>;
+			clocks = <&rcc STM32_CLOCK(APB7, 5)>;
 			status = "disabled";
 		};
 
@@ -354,7 +354,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x40005400 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB1, 21U)>;
+			clocks = <&rcc STM32_CLOCK(APB1, 21)>;
 			interrupts = <43 0>, <44 0>;
 			interrupt-names = "event", "error";
 			status = "disabled";
@@ -366,7 +366,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x46002800 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB7, 7U)>;
+			clocks = <&rcc STM32_CLOCK(APB7, 7)>;
 			interrupts = <54 0>, <55 0>;
 			interrupt-names = "event", "error";
 			status = "disabled";
@@ -488,7 +488,7 @@
 		adc4: adc@46021000 {
 			compatible = "st,stm32-adc";
 			reg = <0x46021000 0x400>;
-			clocks = <&rcc STM32_CLOCK(AHB4, 5U)>,
+			clocks = <&rcc STM32_CLOCK(AHB4, 5)>,
 				 <&rcc STM32_SRC_HCLK1 ADC_SEL(0)>;
 			interrupts = <65 0>;
 			status = "disabled";
@@ -509,7 +509,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x46004400 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB7, 11U)>;
+			clocks = <&rcc STM32_CLOCK(APB7, 11)>;
 			interrupts = <49 1>;
 			interrupt-names = "wakeup";
 			status = "disabled";
@@ -520,7 +520,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x40009400 0x400>;
-			clocks = <&rcc STM32_CLOCK(APB1_2, 5U)>;
+			clocks = <&rcc STM32_CLOCK(APB1_2, 5)>;
 			interrupts = <50 1>;
 			interrupt-names = "wakeup";
 			status = "disabled";
@@ -530,7 +530,7 @@
 			compatible = "st,stm32-rng";
 			reg = <0x420c0800 0x400>;
 			interrupts = <59 0>;
-			clocks = <&rcc STM32_CLOCK(AHB2, 18U)>,
+			clocks = <&rcc STM32_CLOCK(AHB2, 18)>,
 				 <&rcc STM32_SRC_HSI16 RNG_SEL(2)>;
 			nist-config = <0xf00d>;
 			health-test-config = <0xaac7>;
@@ -542,7 +542,7 @@
 			#dma-cells = <3>;
 			reg = <0x40020000 0x1000>;
 			interrupts = <29 0 30 0 31 0 32 0 33 0 34 0 35 0 36 0>;
-			clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
+			clocks = <&rcc STM32_CLOCK(AHB1, 0)>;
 			dma-channels = <8>;
 			dma-requests = <52>;
 			dma-offset = <0>;