1414#include <zephyr/arch/ cpu .h>
1515#include <zephyr/arch/ common /pm_s2ram.h>
1616
17+ / **
18+ * Macro expanding to an integer literal equal to the offset of
19+ * field `sr_name` in `struct __cpu_context`. This macro has to
20+ * be implemented in C , because GEN_OFFSET_SYM provides offsets
21+ * as C preprocessor definitions - there are not visible to the
22+ * assembler.
23+ *
24+ * See also: `arch/arm/core/offsets/offsets_aarch32.c`
25+ * /
26+ #define CPU_CTX_SR_OFFSET(sr_name) \
27+ ___cpu_context_t_ ## sr_name ## _OFFSET
28+
29+ / **
30+ * Macros used to save / load a special register in __cpu_context.
31+ * These also have to be implemented in C due to CPU_CTX_SR_OFFSET.
32+ * /
33+ #define SAVE_SPECIAL_REG(sr_name , cpu_ctx_reg , tmp_reg) \
34+ mrs tmp_reg , sr_name ; \
35+ str tmp_reg , [ cpu_ctx_reg , # CPU_CTX_SR_OFFSET(sr_name) ] ;
36+
37+ #define RESTORE_SPECIAL_REG(sr_name , cpu_ctx_reg , tmp_reg) \
38+ ldr tmp_reg , [ cpu_ctx_reg , # CPU_CTX_SR_OFFSET(sr_name) ] ; \
39+ msr sr_name , tmp_reg ;
40+
1741_ASM_FILE_PROLOGUE
1842
1943GTEXT(pm_s2ram_mark_set)
@@ -34,29 +58,21 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
3458 / * Store CPU context * /
3559 ldr r1 , =_cpu_context
3660
37- mrs r2 , msp
38- str r2 , [ r1 , #___cpu_context_t_msp_OFFSET ]
61+ SAVE_SPECIAL_REG(msp , r1 , r2)
3962
40- mrs r2 , msplim
41- str r2 , [ r1 , #___cpu_context_t_msplim_OFFSET ]
63+ SAVE_SPECIAL_REG(msplim , r1 , r2)
4264
43- mrs r2 , psp
44- str r2 , [ r1 , #___cpu_context_t_psp_OFFSET ]
65+ SAVE_SPECIAL_REG(psp , r1 , r2)
4566
46- mrs r2 , psplim
47- str r2 , [ r1 , #___cpu_context_t_psplim_OFFSET ]
67+ SAVE_SPECIAL_REG(psplim , r1 , r2)
4868
49- mrs r2 , primask
50- str r2 , [ r1 , #___cpu_context_t_primask_OFFSET ]
69+ SAVE_SPECIAL_REG(primask , r1 , r2)
5170
52- mrs r2 , faultmask
53- str r2 , [ r1 , #___cpu_context_t_faultmask_OFFSET ]
71+ SAVE_SPECIAL_REG(faultmask , r1 , r2)
5472
55- mrs r2 , basepri
56- str r2 , [ r1 , #___cpu_context_t_basepri_OFFSET ]
73+ SAVE_SPECIAL_REG(basepri , r1 , r2)
5774
58- mrs r2 , control
59- str r2 , [ r1 , #___cpu_context_t_control_OFFSET ]
75+ SAVE_SPECIAL_REG(control , r1 , r2)
6076
6177 / *
6278 * Mark entering suspend to RAM.
@@ -108,29 +124,21 @@ resume:
108124 * /
109125 ldr r0 , =_cpu_context
110126
111- ldr r1 , [ r0 , #___cpu_context_t_msp_OFFSET ]
112- msr msp , r1
127+ RESTORE_SPECIAL_REG(msp , r0 , r1)
113128
114- ldr r1 , [ r0 , #___cpu_context_t_msplim_OFFSET ]
115- msr msplim , r1
129+ RESTORE_SPECIAL_REG(msplim , r0 , r1)
116130
117- ldr r1 , [ r0 , #___cpu_context_t_psp_OFFSET ]
118- msr psp , r1
131+ RESTORE_SPECIAL_REG(psp , r0 , r1)
119132
120- ldr r1 , [ r0 , #___cpu_context_t_psplim_OFFSET ]
121- msr psplim , r1
133+ RESTORE_SPECIAL_REG(psplim , r0 , r1)
122134
123- ldr r1 , [ r0 , #___cpu_context_t_primask_OFFSET ]
124- msr primask , r1
135+ RESTORE_SPECIAL_REG(primask , r0 , r1)
125136
126- ldr r1 , [ r0 , #___cpu_context_t_faultmask_OFFSET ]
127- msr faultmask , r1
137+ RESTORE_SPECIAL_REG(faultmask , r0 , r1)
128138
129- ldr r1 , [ r0 , #___cpu_context_t_basepri_OFFSET ]
130- msr basepri , r1
139+ RESTORE_SPECIAL_REG(basepri , r0 , r1)
131140
132- ldr r1 , [ r0 , #___cpu_context_t_control_OFFSET ]
133- msr control , r1
141+ RESTORE_SPECIAL_REG(control , r0 , r1)
134142 isb
135143
136144 pop {r4 - r12 , lr}
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