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drivers: gpio: format gpio_mcux.c
use clang-format to format gpio_mcux file Signed-off-by: Lucien Zhao <[email protected]>
1 parent 3a8980f commit 14f140e

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-95
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‎drivers/gpio/gpio_mcux.c‎

Lines changed: 75 additions & 95 deletions
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,7 @@ struct gpio_mcux_data {
3232
sys_slist_t callbacks;
3333
};
3434

35-
static int gpio_mcux_configure(const struct device *dev,
36-
gpio_pin_t pin, gpio_flags_t flags)
35+
static int gpio_mcux_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
3736
{
3837
const struct gpio_mcux_config *config = dev->config;
3938
GPIO_Type *gpio_base = config->gpio_base;
@@ -134,9 +133,7 @@ static int gpio_mcux_port_get_raw(const struct device *dev, uint32_t *value)
134133
return 0;
135134
}
136135

137-
static int gpio_mcux_port_set_masked_raw(const struct device *dev,
138-
uint32_t mask,
139-
uint32_t value)
136+
static int gpio_mcux_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value)
140137
{
141138
const struct gpio_mcux_config *config = dev->config;
142139
GPIO_Type *gpio_base = config->gpio_base;
@@ -146,8 +143,7 @@ static int gpio_mcux_port_set_masked_raw(const struct device *dev,
146143
return 0;
147144
}
148145

149-
static int gpio_mcux_port_set_bits_raw(const struct device *dev,
150-
uint32_t mask)
146+
static int gpio_mcux_port_set_bits_raw(const struct device *dev, uint32_t mask)
151147
{
152148
const struct gpio_mcux_config *config = dev->config;
153149
GPIO_Type *gpio_base = config->gpio_base;
@@ -157,8 +153,7 @@ static int gpio_mcux_port_set_bits_raw(const struct device *dev,
157153
return 0;
158154
}
159155

160-
static int gpio_mcux_port_clear_bits_raw(const struct device *dev,
161-
uint32_t mask)
156+
static int gpio_mcux_port_clear_bits_raw(const struct device *dev, uint32_t mask)
162157
{
163158
const struct gpio_mcux_config *config = dev->config;
164159
GPIO_Type *gpio_base = config->gpio_base;
@@ -179,10 +174,8 @@ static int gpio_mcux_port_toggle_bits(const struct device *dev, uint32_t mask)
179174
}
180175

181176
#if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT)
182-
static uint32_t get_port_pcr_irqc_value_from_flags(const struct device *dev,
183-
uint32_t pin,
184-
enum gpio_int_mode mode,
185-
enum gpio_int_trig trig)
177+
static uint32_t get_port_pcr_irqc_value_from_flags(const struct device *dev, uint32_t pin,
178+
enum gpio_int_mode mode, enum gpio_int_trig trig)
186179
{
187180
port_interrupt_t port_interrupt = 0;
188181

@@ -214,22 +207,20 @@ static uint32_t get_port_pcr_irqc_value_from_flags(const struct device *dev,
214207

215208
return PORT_PCR_IRQC(port_interrupt);
216209
}
217-
#endif /* !defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT */
218-
219-
#if (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) && \
220-
FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT)
221-
222-
#define GPIO_MCUX_INTERRUPT_DISABLED 0
223-
#define GPIO_MCUX_INTERRUPT_LOGIC_0 0x8
224-
#define GPIO_MCUX_INTERRUPT_RISING_EDGE 0x9
225-
#define GPIO_MCUX_INTERRUPT_FALLING_EDGE 0xA
226-
#define GPIO_MCUX_INTERRUPT_BOTH_EDGE 0xB
227-
#define GPIO_MCUX_INTERRUPT_LOGIC_1 0xC
228-
229-
static uint32_t get_gpio_icr_irqc_value_from_flags(const struct device *dev,
230-
uint32_t pin,
231-
enum gpio_int_mode mode,
232-
enum gpio_int_trig trig)
210+
#endif /* !defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT */
211+
212+
#if (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) && \
213+
FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT)
214+
215+
#define GPIO_MCUX_INTERRUPT_DISABLED 0
216+
#define GPIO_MCUX_INTERRUPT_LOGIC_0 0x8
217+
#define GPIO_MCUX_INTERRUPT_RISING_EDGE 0x9
218+
#define GPIO_MCUX_INTERRUPT_FALLING_EDGE 0xA
219+
#define GPIO_MCUX_INTERRUPT_BOTH_EDGE 0xB
220+
#define GPIO_MCUX_INTERRUPT_LOGIC_1 0xC
221+
222+
static uint32_t get_gpio_icr_irqc_value_from_flags(const struct device *dev, uint32_t pin,
223+
enum gpio_int_mode mode, enum gpio_int_trig trig)
233224
{
234225
uint8_t gpio_interrupt = 0;
235226

@@ -261,11 +252,10 @@ static uint32_t get_gpio_icr_irqc_value_from_flags(const struct device *dev,
261252

262253
return GPIO_ICR_IRQC(gpio_interrupt);
263254
}
264-
#endif /* (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) */
255+
#endif /* (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) */
265256

266-
static int gpio_mcux_pin_interrupt_configure(const struct device *dev,
267-
gpio_pin_t pin, enum gpio_int_mode mode,
268-
enum gpio_int_trig trig)
257+
static int gpio_mcux_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
258+
enum gpio_int_mode mode, enum gpio_int_trig trig)
269259
{
270260
const struct gpio_mcux_config *config = dev->config;
271261
GPIO_Type *gpio_base = config->gpio_base;
@@ -277,33 +267,31 @@ static int gpio_mcux_pin_interrupt_configure(const struct device *dev,
277267
}
278268

279269
/* Check for an invalid pin configuration */
280-
if ((mode != GPIO_INT_MODE_DISABLED) &&
281-
((gpio_base->PDDR & BIT(pin)) != 0)) {
270+
if ((mode != GPIO_INT_MODE_DISABLED) && ((gpio_base->PDDR & BIT(pin)) != 0)) {
282271
return -EINVAL;
283272
}
284273

285274
/* Check if GPIO port supports interrupts */
286-
if ((mode != GPIO_INT_MODE_DISABLED) &&
287-
((config->flags & GPIO_INT_ENABLE) == 0U)) {
275+
if ((mode != GPIO_INT_MODE_DISABLED) && ((config->flags & GPIO_INT_ENABLE) == 0U)) {
288276
return -ENOTSUP;
289277
}
290278

291279
#if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT)
292280
uint32_t pcr = get_port_pcr_irqc_value_from_flags(dev, pin, mode, trig);
293281

294282
port_base->PCR[pin] = (port_base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | pcr;
295-
#elif (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) && \
296-
FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT)
283+
#elif (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) && \
284+
FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT)
297285
uint32_t icr = get_gpio_icr_irqc_value_from_flags(dev, pin, mode, trig);
298286

299287
gpio_base->ICR[pin] = (gpio_base->ICR[pin] & ~GPIO_ICR_IRQC_MASK) | icr;
300-
#endif /* !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) */
288+
#endif /* !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) */
301289

302290
return 0;
303291
}
304292

305-
static int gpio_mcux_manage_callback(const struct device *dev,
306-
struct gpio_callback *callback, bool set)
293+
static int gpio_mcux_manage_callback(const struct device *dev, struct gpio_callback *callback,
294+
bool set)
307295
{
308296
struct gpio_mcux_data *data = dev->data;
309297

@@ -321,16 +309,16 @@ static void gpio_mcux_port_isr(const struct device *dev)
321309

322310
/* Clear the port interrupts */
323311
config->port_base->ISFR = int_status;
324-
#elif (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) && \
325-
FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT)
312+
#elif (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT) && \
313+
FSL_FEATURE_GPIO_HAS_INTERRUPT_CHANNEL_SELECT)
326314
int_status = config->gpio_base->ISFR[0];
327315

328316
/* Clear the gpio interrupts */
329317
config->gpio_base->ISFR[0] = int_status;
330318
#else
331319
int_status = 0U;
332320
ARG_UNUSED(config);
333-
#endif /* !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) */
321+
#endif /* !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) */
334322

335323
gpio_fire_callbacks(&data->callbacks, dev, int_status);
336324
}
@@ -350,20 +338,18 @@ static void gpio_mcux_shared_cluster_isr(const struct device *ports[])
350338

351339
#define CLUSTER_ARRAY_ELEMENT(node_id) DEVICE_DT_GET(node_id),
352340

353-
#define GPIO_MCUX_CLUSTER_INIT(node_id) \
354-
const struct device *shared_array##node_id[DT_CHILD_NUM_STATUS_OKAY(node_id) + 1] = \
355-
{DT_FOREACH_CHILD_STATUS_OKAY(node_id, CLUSTER_ARRAY_ELEMENT) NULL}; \
356-
\
357-
static int gpio_mcux_shared_interrupt_init##node_id(void) \
358-
{ \
359-
IRQ_CONNECT(DT_IRQN(node_id), \
360-
DT_IRQ(node_id, priority), \
361-
gpio_mcux_shared_cluster_isr, \
362-
shared_array##node_id, 0); \
363-
irq_enable(DT_IRQN(node_id)); \
364-
\
365-
return 0; \
366-
} \
341+
#define GPIO_MCUX_CLUSTER_INIT(node_id) \
342+
const struct device *shared_array##node_id[DT_CHILD_NUM_STATUS_OKAY(node_id) + 1] = { \
343+
DT_FOREACH_CHILD_STATUS_OKAY(node_id, CLUSTER_ARRAY_ELEMENT) NULL}; \
344+
\
345+
static int gpio_mcux_shared_interrupt_init##node_id(void) \
346+
{ \
347+
IRQ_CONNECT(DT_IRQN(node_id), DT_IRQ(node_id, priority), \
348+
gpio_mcux_shared_cluster_isr, shared_array##node_id, 0); \
349+
irq_enable(DT_IRQN(node_id)); \
350+
\
351+
return 0; \
352+
} \
367353
SYS_INIT(gpio_mcux_shared_interrupt_init##node_id, POST_KERNEL, 0);
368354

369355
DT_FOREACH_STATUS_OKAY(nxp_gpio_cluster, GPIO_MCUX_CLUSTER_INIT)
@@ -404,47 +390,41 @@ static DEVICE_API(gpio, gpio_mcux_driver_api) = {
404390
#endif /* CONFIG_GPIO_GET_DIRECTION */
405391
};
406392

407-
#define GPIO_MCUX_IRQ_INIT(n) \
408-
do { \
409-
IRQ_CONNECT(DT_INST_IRQN(n), \
410-
DT_INST_IRQ(n, priority), \
411-
gpio_mcux_port_isr, \
412-
DEVICE_DT_INST_GET(n), 0); \
413-
\
414-
irq_enable(DT_INST_IRQN(n)); \
393+
#define GPIO_MCUX_IRQ_INIT(n) \
394+
do { \
395+
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), gpio_mcux_port_isr, \
396+
DEVICE_DT_INST_GET(n), 0); \
397+
\
398+
irq_enable(DT_INST_IRQN(n)); \
415399
} while (false)
416400

417401
#define GPIO_PORT_BASE_ADDR(n) DT_REG_ADDR(DT_INST_PHANDLE(n, nxp_kinetis_port))
418402

419-
#define GPIO_DEVICE_INIT_MCUX(n) \
420-
static int gpio_mcux_port## n ## _init(const struct device *dev); \
421-
\
422-
static const struct gpio_mcux_config gpio_mcux_port## n ## _config = {\
423-
.common = { \
424-
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n),\
425-
}, \
426-
.gpio_base = (GPIO_Type *) DT_INST_REG_ADDR(n), \
427-
.port_base = (PORT_Type *) GPIO_PORT_BASE_ADDR(n), \
428-
.flags = UTIL_AND(UTIL_OR(DT_INST_IRQ_HAS_IDX(n, 0), \
429-
GPIO_HAS_SHARED_IRQ), GPIO_INT_ENABLE), \
430-
}; \
431-
\
432-
static struct gpio_mcux_data gpio_mcux_port## n ##_data; \
433-
\
434-
DEVICE_DT_INST_DEFINE(n, \
435-
gpio_mcux_port## n ##_init, \
436-
NULL, \
437-
&gpio_mcux_port## n ##_data, \
438-
&gpio_mcux_port## n##_config, \
439-
POST_KERNEL, \
440-
CONFIG_GPIO_INIT_PRIORITY, \
441-
&gpio_mcux_driver_api); \
442-
\
443-
static int gpio_mcux_port## n ##_init(const struct device *dev) \
444-
{ \
403+
#define GPIO_DEVICE_INIT_MCUX(n) \
404+
static int gpio_mcux_port##n##_init(const struct device *dev); \
405+
\
406+
static const struct gpio_mcux_config gpio_mcux_port##n##_config = { \
407+
.common = \
408+
{ \
409+
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
410+
}, \
411+
.gpio_base = (GPIO_Type *)DT_INST_REG_ADDR(n), \
412+
.port_base = (PORT_Type *)GPIO_PORT_BASE_ADDR(n), \
413+
.flags = UTIL_AND(UTIL_OR(DT_INST_IRQ_HAS_IDX(n, 0), GPIO_HAS_SHARED_IRQ), \
414+
GPIO_INT_ENABLE), \
415+
}; \
416+
\
417+
static struct gpio_mcux_data gpio_mcux_port##n##_data; \
418+
\
419+
DEVICE_DT_INST_DEFINE(n, gpio_mcux_port##n##_init, NULL, &gpio_mcux_port##n##_data, \
420+
&gpio_mcux_port##n##_config, POST_KERNEL, CONFIG_GPIO_INIT_PRIORITY, \
421+
&gpio_mcux_driver_api); \
422+
\
423+
static int gpio_mcux_port##n##_init(const struct device *dev) \
424+
{ \
445425
IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0), \
446-
(GPIO_MCUX_IRQ_INIT(n);)) \
447-
return 0; \
426+
(GPIO_MCUX_IRQ_INIT(n);)) \
427+
return 0; \
448428
}
449429

450430
DT_INST_FOREACH_STATUS_OKAY(GPIO_DEVICE_INIT_MCUX)

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