Merge "Merge remote-tracking branch 'origin/core'"

Author: Anas Nashif

.gitignore

@@ -31,3 +31,6 @@ scripts/grub
 doc/reference/kconfig/CONFIG_*
 doc/reference/kconfig/index.rst
 tags
+.project
+.cproject
+.xxproject

Kbuild

@@ -90,7 +90,7 @@ define rule_cc_o_c_1
 	$(call echo-cmd,cc_o_c_1) $(cmd_cc_o_c_1);
 endef
 
-cmd_cc_o_c_1 = $(CC) $(KBUILD_CFLAGS) $(ZEPHYRINCLUDE) -c -o $@ $<
+cmd_cc_o_c_1 = $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(ZEPHYRINCLUDE) -c -o $@ $<
 
 arch/$(ARCH)/core/offsets/offsets.o: arch/$(ARCH)/core/offsets/offsets.c $(KCONFIG_CONFIG) \
 				include/generated/generated_dts_board.h

Makefile

@@ -376,7 +376,6 @@ ZEPHYRINCLUDE    = \
 KBUILD_CPPFLAGS := -DKERNEL -D__ZEPHYR__=1
 
 KBUILD_CFLAGS   := -c -g -std=c99 \
-		-fno-asynchronous-unwind-tables \
 		-Wall \
 		-Wformat \
 		-Wformat-security \
@@ -595,6 +594,12 @@ drivers-y := drivers/
 ARCH = $(subst $(DQUOTE),,$(CONFIG_ARCH))
 export ARCH
 
+ifeq ($(CONFIG_DEBUG),y)
+KBUILD_CFLAGS += -Og
+else
+KBUILD_CFLAGS += -Os
+endif
+
 ifdef ZEPHYR_GCC_VARIANT
 include $(srctree)/scripts/Makefile.toolchain.$(ZEPHYR_GCC_VARIANT)
 else
@@ -632,11 +637,8 @@ KBUILD_CFLAGS += $(call cc-option,-fno-reorder-blocks,) \
                  $(call cc-option,-fno-partial-inlining)
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
-KBUILD_CFLAGS  += -Og
-else
-KBUILD_CFLAGS  += -Os
-endif
+# Some GCC variants don't support these
+KBUILD_CFLAGS += $(call cc-option,-fno-asynchronous-unwind-tables,)
 
 ifeq ($(CONFIG_STACK_CANARIES),y)
 KBUILD_CFLAGS += $(call cc-option,-fstack-protector-all,)
@@ -683,8 +685,10 @@ else
 # Use make W=1 to enable this warning (see scripts/Makefile.build)
 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
 KBUILD_CFLAGS += $(call cc-option,-fno-reorder-functions)
+ifneq (${ZEPHYR_GCC_VARIANT},xcc)
 KBUILD_CFLAGS += $(call cc-option,-fno-defer-pop)
 endif
+endif
 
 # We trigger additional mismatches with less inlining
 ifdef CONFIG_DEBUG_SECTION_MISMATCH

arch/Kconfig

@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2014-2015 Wind River Systems, Inc.
 # Copyright (c) 2015 Intel Corporation
+# Copyright (c) 2016 Cadence Design Systems, Inc.
 #
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -29,6 +30,9 @@ config NIOS2
 config RISCV32
 	bool "RISCV32 architecture"
 
+config XTENSA
+	bool "Xtensa architecture"
+
 endchoice
 
 #

arch/xtensa/Kbuild

@@ -0,0 +1,12 @@
+subdir-ccflags-y +=-I$(srctree)/include/drivers
+subdir-ccflags-y +=-I$(srctree)/drivers
+subdir-asflags-y := ${subdir-ccflags-y}
+
+ifneq ($(SOC_FAMILY),)
+obj-y += soc/$(SOC_FAMILY)/
+else
+obj-y += soc/$(SOC_PATH)/
+endif
+
+obj-y += core/
+obj-y += core/startup/

arch/xtensa/Kconfig

@@ -0,0 +1,81 @@
+# Kconfig - XTENSA architecture configuration options
+#
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+choice
+	prompt "XTENSA core Selection"
+	default sample_controller
+	depends on XTENSA
+
+source "arch/xtensa/soc/Kconfig.cores"
+endchoice
+
+menu "XTENSA Options"
+	depends on XTENSA
+
+config ARCH
+	default "xtensa"
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	int
+	prompt "Hardware clock cycles per second, 2000000 for ISS"
+	default 2000000
+	range 1000000 1000000000
+	help
+	This option specifies hardware clock.
+
+config XTENSA_NO_IPC
+	bool "Core has no IPC support"
+	select ATOMIC_OPERATIONS_C
+	default n
+	help
+	Uncheck this if you core does not implment "SCOMPARE1" register and "s32c1i"
+	isntruction.
+
+config SW_ISR_TABLE
+	bool
+	prompt "Enable software interrupt handler table"
+	default y
+	help
+	Enable an interrupt handler table implemented in software. This
+	table, unlike ISRs connected directly in the vector table, allow
+	a parameter to be passed to the interrupt handlers. Also, invoking
+	the exeception/interrupt exit stub is automatically done.
+	This has to be enabled for dynamically connecting interrupt handlers
+	at runtime (SW_ISR_TABLE_DYNAMIC).
+
+config IRQ_OFFLOAD
+	bool "Enable IRQ offload"
+	default n
+	help
+	Enable irq_offload() API which allows functions to be synchronously
+	run in interrupt context. Uses one entry in the IDT.  Mainly useful
+	for test cases.
+
+config SW_ISR_TABLE_DYNAMIC
+	bool
+	prompt "Allow installing interrupt handlers at runtime"
+	depends on SW_ISR_TABLE
+	default n
+	help
+	This option enables irq_connect_dynamic(). It moves the ISR table to
+	SRAM so that it is writable. This has the side-effect of removing
+	write-protection on the ISR table.
+
+menu "Specific core configuration"
+
+config IRQ_OFFLOAD_INTNUM
+	int
+	prompt "IRQ offload SW interrupt index"
+	help
+	 The index of the software interrupt to be used for IRQ offload.
+
+	 Please note that in order for IRQ offload to work correctly the selected
+	 interrupt shall have its priority shall not exceed XCHAL_EXCM_LEVEL.
+
+source "arch/xtensa/soc/*/Kconfig"
+
+endmenu
+
+endmenu

arch/xtensa/Makefile

@@ -0,0 +1,41 @@
+SOC_PATH=${XTENSA_CORE}
+export SOC_PATH
+
+flagBoardType=
+ifeq ($(CONFIG_BOARD_XTENSA),y)
+flagBoardType= -DXT_BOARD
+endif
+ifeq ($(CONFIG_SIMULATOR_XTENSA),y)
+flagBoardType= -DXT_SIMULATOR
+endif
+
+# XCC emits an annoying warning if this is used even though the
+# $(call cc-option,) test in toplevel Makefile passes.
+KBUILD_CFLAGS := $(filter-out -fno-omit-frame-pointer, \
+			      ${KBUILD_CFLAGS})
+
+# Put functions and data in their own binary sections so that ld can
+# garbage collect them
+KBUILD_CFLAGS += $(call cc-option,-ffunction-sections,) \
+		 $(call cc-option,-fdata-sections,)
+
+KBUILD_AFLAGS += $(flagBoardType)
+KBUILD_CFLAGS += -DPROC_$(XTENSA_CORE) \
+		 -DCONFIG_$(XTENSA_CORE) \
+		 $(flagBoardType) \
+		 $(call cc-option,-fms-extensions,)
+
+include $(srctree)/arch/$(ARCH)/core/Makefile
+include $(srctree)/arch/$(ARCH)/soc/$(SOC_PATH)/Makefile
+
+cflags-$(CONFIG_LTO) += $(call cc-option,-flto,)
+
+KBUILD_CFLAGS += $(cflags-y)
+KBUILD_CXXFLAGS += $(cflags-y)
+
+QEMU_CPU_TYPE_xtensa ?= unsupported
+QEMU_FLAGS_xtensa = -cpu $(QEMU_CPU_TYPE_xtensa) \
+                    -machine sim -semihosting -nographic
+QEMU_xtensa = qemu-system-xtensa
+
+export QEMU_FLAGS_xtensa QEMU_xtensa

arch/xtensa/core/Makefile

@@ -0,0 +1,18 @@
+ccflags-y += -I$(srctree)/kernel/unified/include
+asflags-y += -I$(srctree)/kernel/unified/include --longcalls
+
+ifdef CONFIG_ATOMIC_OPERATIONS_C
+# Use C routines from kernel/nanokernel/atomic.c
+obj-atomic=
+else
+# Use our own routines implmented in assembly
+obj-atomic=atomic.o
+endif
+obj-y = ${obj-atomic} cpu_idle.o fatal.o \
+	swap.o thread.o xt_zephyr.o	xtensa_context.o xtensa_intr_asm.o \
+	xtensa_intr.o xtensa_vectors.o irq_manage.o
+obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
+obj-$(CONFIG_SIMULATOR_XTENSA) += crt1-sim.o
+obj-$(CONFIG_BOARD_XTENSA) += crt1-boards.o
+# Keep this last so that vague linking works
+obj-y += sw_isr_table.o