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Ayush1325fabiobaltieri
Ayush1325
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fabiobaltieri
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dts: arm64: ti: am62x_a53: Use common k3-am62-main.dtsi
- Replace the UARTs with the ones defined in k3-am62-main.dtsi. - Also ends up adding main prefix to the uarts. - Adjust the board dts to use the new names. - Since the same file is also used by m4 cores, do not add interrupt properties, since they are different between m4 and a53 Signed-off-by: Ayush Singh <[email protected]>
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4 files changed

+45
-86
lines changed

4 files changed

+45
-86
lines changed

‎boards/beagle/pocketbeagle_2/pocketbeagle_2_am62_a53-common.dtsi‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@
1111
compatible = "beagle,pocketbeagle_2_a53";
1212

1313
chosen {
14-
zephyr,console = &uart6;
15-
zephyr,shell-uart = &uart6;
14+
zephyr,console = &main_uart6;
15+
zephyr,shell-uart = &main_uart6;
1616
zephyr,sram = &a53_ddr_section;
1717
};
1818

@@ -62,7 +62,7 @@
6262
};
6363
};
6464

65-
&uart6 {
65+
&main_uart6 {
6666
pinctrl-0 = <&main_uart6_rx_default &main_uart6_tx_default>;
6767
pinctrl-names = "default";
6868
status = "okay";

‎boards/phytec/phyboard_lyra/phyboard_lyra_am6234_a53.dts‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,8 @@
1313
compatible = "phytec,phyboard-lyra-am62xx-a53", "ti,am625";
1414

1515
chosen {
16-
zephyr,console = &uart0;
17-
zephyr,shell-uart = &uart0;
16+
zephyr,console = &main_uart0;
17+
zephyr,shell-uart = &main_uart0;
1818
zephyr,sram = &ddr0;
1919
};
2020

@@ -52,7 +52,7 @@
5252
};
5353
};
5454

55-
&uart0 {
55+
&main_uart0 {
5656
current-speed = <115200>;
5757
pinctrl-0 = <&uart0_rx_default &uart0_tx_default>;
5858
pinctrl-names = "default";

‎boards/ti/sk_am62/sk_am62_am6234_a53.dts‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,8 @@
1414
compatible = "ti,am62x_a53_sk";
1515

1616
chosen {
17-
zephyr,console = &uart0;
18-
zephyr,shell-uart = &uart0;
17+
zephyr,console = &main_uart0;
18+
zephyr,shell-uart = &main_uart0;
1919
zephyr,sram = &ddr0;
2020
};
2121

@@ -43,7 +43,7 @@
4343
};
4444
};
4545

46-
&uart0 {
46+
&main_uart0 {
4747
current-speed = <115200>;
4848
pinctrl-0 = <&uart0_rx_default &uart0_tx_default>;
4949
pinctrl-names = "default";

‎dts/arm64/ti/ti_am62x_a53.dtsi‎

Lines changed: 36 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
1111
#include <zephyr/dt-bindings/pinctrl/ti-k3-pinctrl.h>
1212
#include <zephyr/dt-bindings/gpio/gpio.h>
13+
#include <ti/k3-am62-main.dtsi>
1314

1415
/ {
1516
#address-cells = <1>;
@@ -65,83 +66,6 @@
6566
status = "okay";
6667
};
6768

68-
uart0: serial@2800000 {
69-
compatible = "ns16550";
70-
reg = <0x02800000 0x100>;
71-
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
72-
interrupt-parent = <&gic>;
73-
clock-frequency = <48000000>;
74-
current-speed = <115200>;
75-
reg-shift = <2>;
76-
status = "disabled";
77-
};
78-
79-
uart1: serial@2810000 {
80-
compatible = "ns16550";
81-
reg = <0x02810000 0x100>;
82-
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
83-
interrupt-parent = <&gic>;
84-
clock-frequency = <48000000>;
85-
current-speed = <115200>;
86-
reg-shift = <2>;
87-
status = "disabled";
88-
};
89-
90-
uart2: serial@2820000 {
91-
compatible = "ns16550";
92-
reg = <0x02820000 0x100>;
93-
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
94-
interrupt-parent = <&gic>;
95-
clock-frequency = <48000000>;
96-
current-speed = <115200>;
97-
reg-shift = <2>;
98-
status = "disabled";
99-
};
100-
101-
uart3: serial@2830000 {
102-
compatible = "ns16550";
103-
reg = <0x02830000 0x100>;
104-
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
105-
interrupt-parent = <&gic>;
106-
clock-frequency = <48000000>;
107-
current-speed = <115200>;
108-
reg-shift = <2>;
109-
status = "disabled";
110-
};
111-
112-
uart4: serial@2840000 {
113-
compatible = "ns16550";
114-
reg = <0x02840000 0x100>;
115-
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
116-
interrupt-parent = <&gic>;
117-
clock-frequency = <48000000>;
118-
current-speed = <115200>;
119-
reg-shift = <2>;
120-
status = "disabled";
121-
};
122-
123-
uart5: serial@2850000 {
124-
compatible = "ns16550";
125-
reg = <0x02850000 0x100>;
126-
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
127-
interrupt-parent = <&gic>;
128-
clock-frequency = <48000000>;
129-
current-speed = <115200>;
130-
reg-shift = <2>;
131-
status = "disabled";
132-
};
133-
134-
uart6: serial@2860000 {
135-
compatible = "ns16550";
136-
reg = <0x02860000 0x100>;
137-
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
138-
interrupt-parent = <&gic>;
139-
clock-frequency = <48000000>;
140-
current-speed = <115200>;
141-
reg-shift = <2>;
142-
status = "disabled";
143-
};
144-
14569
mbox0: mailbox0@29000000 {
14670
compatible = "ti,omap-mailbox";
14771
reg = <0x29000000 0x200>;
@@ -215,3 +139,38 @@
215139
status = "disabled";
216140
};
217141
};
142+
143+
&main_uart0 {
144+
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
145+
interrupt-parent = <&gic>;
146+
};
147+
148+
&main_uart1 {
149+
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
150+
interrupt-parent = <&gic>;
151+
};
152+
153+
&main_uart2 {
154+
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
155+
interrupt-parent = <&gic>;
156+
};
157+
158+
&main_uart3 {
159+
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
160+
interrupt-parent = <&gic>;
161+
};
162+
163+
&main_uart4 {
164+
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
165+
interrupt-parent = <&gic>;
166+
};
167+
168+
&main_uart5 {
169+
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
170+
interrupt-parent = <&gic>;
171+
};
172+
173+
&main_uart6 {
174+
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
175+
interrupt-parent = <&gic>;
176+
};

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