@@ -170,7 +170,7 @@ struct uhc_dwc2_chan {
170170
171171struct uhc_dwc2_data {
172172 struct k_sem irq_sem ;
173- struct k_thread thread_data ;
173+ struct k_thread thread ;
174174 /* Mutex for port access */
175175 struct k_mutex mutex ;
176176 /* Main events the driver thread waits for */
@@ -227,6 +227,8 @@ struct uhc_dwc2_data {
227227 ((uint32_t)(((config)->ghwcfg4 & USB_DWC2_GHWCFG4_PHYDATAWIDTH_MASK) >> \
228228 USB_DWC2_GHWCFG4_PHYDATAWIDTH_POS))
229229
230+ K_THREAD_STACK_DEFINE (uhc_dwc2_stack , CONFIG_UHC_DWC2_STACK_SIZE );
231+
230232/*
231233 * DWC2 FIFO Management
232234 */
@@ -1554,34 +1556,6 @@ static inline void uhc_dwc2_handle_chan_events(const struct device *dev, struct
15541556 }
15551557}
15561558
1557- /*
1558- * Thread that processes USB events from the DWC2 controller: Port, Pipe.
1559- */
1560- static inline void uhc_dwc2_thread_handler (void * const arg )
1561- {
1562- const struct device * dev = (const struct device * )arg ;
1563- struct uhc_dwc2_data * const priv = uhc_get_private (dev );
1564- uint32_t evt ;
1565-
1566- evt = k_event_wait (& priv -> event , UINT32_MAX , false, K_FOREVER );
1567-
1568- uhc_lock_internal (dev , K_FOREVER );
1569-
1570- if (evt & BIT (UHC_DWC2_EVENT_PORT )) {
1571- k_event_clear (& priv -> event , BIT (UHC_DWC2_EVENT_PORT ));
1572- uhc_dwc2_handle_port_events (dev );
1573- }
1574-
1575- for (uint32_t i = 0 ; i < 32 ; i ++ ) {
1576- if (evt & BIT (UHC_DWC2_EVENT_CHAN0 + i )) {
1577- k_event_clear (& priv -> event , BIT (UHC_DWC2_EVENT_CHAN0 + i ));
1578- uhc_dwc2_handle_chan_events (dev , & priv -> chan [i ]);
1579- }
1580- }
1581-
1582- uhc_unlock_internal (dev );
1583- }
1584-
15851559static inline int uhc_dwc2_submit_ctrl_xfer (const struct device * dev , struct uhc_dwc2_chan * chan ,
15861560 struct uhc_transfer * const xfer )
15871561{
@@ -1618,6 +1592,33 @@ static inline int uhc_dwc2_submit_ctrl_xfer(const struct device *dev, struct uhc
16181592 return 0 ;
16191593}
16201594
1595+ static void uhc_dwc2_thread (void * arg1 , void * arg2 , void * arg3 )
1596+ {
1597+ const struct device * dev = (const struct device * )arg1 ;
1598+ struct uhc_dwc2_data * const priv = uhc_get_private (dev );
1599+ uint32_t evt ;
1600+
1601+ while (true) {
1602+ evt = k_event_wait (& priv -> event , UINT32_MAX , false, K_FOREVER );
1603+
1604+ uhc_lock_internal (dev , K_FOREVER );
1605+
1606+ if (evt & BIT (UHC_DWC2_EVENT_PORT )) {
1607+ k_event_clear (& priv -> event , BIT (UHC_DWC2_EVENT_PORT ));
1608+ uhc_dwc2_handle_port_events (dev );
1609+ }
1610+
1611+ for (uint32_t i = 0 ; i < 32 ; i ++ ) {
1612+ if (evt & BIT (UHC_DWC2_EVENT_CHAN0 + i )) {
1613+ k_event_clear (& priv -> event , BIT (UHC_DWC2_EVENT_CHAN0 + i ));
1614+ uhc_dwc2_handle_chan_events (dev , & priv -> chan [i ]);
1615+ }
1616+ }
1617+
1618+ uhc_unlock_internal (dev );
1619+ }
1620+ }
1621+
16211622/*
16221623 * UHC DWC2 Driver API
16231624 */
@@ -1692,7 +1693,6 @@ static int uhc_dwc2_dequeue(const struct device *dev, struct uhc_transfer *const
16921693
16931694static int uhc_dwc2_preinit (const struct device * dev )
16941695{
1695- const struct uhc_dwc2_config * const config = dev -> config ;
16961696 struct uhc_dwc2_data * priv = uhc_get_private (dev );
16971697 struct uhc_data * data = dev -> data ;
16981698
@@ -1704,9 +1704,12 @@ static int uhc_dwc2_preinit(const struct device *dev)
17041704
17051705 /* TODO: Overwrite the DWC2 register values with the devicetree values? */
17061706
1707- ( void ) uhc_dwc2_quirk_caps (dev );
1707+ uhc_dwc2_quirk_caps (dev );
17081708
1709- config -> make_thread (dev );
1709+ k_thread_create (& priv -> thread , uhc_dwc2_stack , K_THREAD_STACK_SIZEOF (uhc_dwc2_stack ),
1710+ uhc_dwc2_thread , (void * )dev , NULL , NULL ,
1711+ K_PRIO_COOP (CONFIG_UHC_DWC2_THREAD_PRIORITY ), K_ESSENTIAL , K_NO_WAIT );
1712+ k_thread_name_set (& priv -> thread , dev -> name );
17101713
17111714 return 0 ;
17121715}
@@ -1870,25 +1873,6 @@ static int uhc_dwc2_shutdown(const struct device *dev)
18701873 * Device Definition and Initialization
18711874 */
18721875
1873- K_THREAD_STACK_DEFINE (uhc_dwc2_stack , CONFIG_UHC_DWC2_STACK_SIZE );
1874-
1875- static void uhc_dwc2_thread (void * arg1 , void * arg2 , void * arg3 )
1876- {
1877- while (true) {
1878- uhc_dwc2_thread_handler (arg1 );
1879- }
1880- }
1881-
1882- static void uhc_dwc2_make_thread (const struct device * dev )
1883- {
1884- struct uhc_dwc2_data * priv = uhc_get_private (dev );
1885-
1886- k_thread_create (& priv -> thread_data , uhc_dwc2_stack , K_THREAD_STACK_SIZEOF (uhc_dwc2_stack ),
1887- uhc_dwc2_thread , (void * )dev , NULL , NULL ,
1888- K_PRIO_COOP (CONFIG_UHC_DWC2_THREAD_PRIORITY ), K_ESSENTIAL , K_NO_WAIT );
1889- k_thread_name_set (& priv -> thread_data , dev -> name );
1890- }
1891-
18921876static const struct uhc_api uhc_dwc2_api = {
18931877 /* Common */
18941878 .lock = uhc_dwc2_lock ,
@@ -1918,7 +1902,6 @@ static struct uhc_dwc2_data uhc_dwc2_data = {
19181902
19191903static const struct uhc_dwc2_config uhc_dwc2_config_host = {
19201904 .base = (struct usb_dwc2_reg * )UHC_DWC2_DT_INST_REG_ADDR (0 ),
1921- .make_thread = uhc_dwc2_make_thread ,
19221905 .quirks = UHC_DWC2_VENDOR_QUIRK_GET (0 ),
19231906 .gsnpsid = DT_INST_PROP (0 , gsnpsid ),
19241907 .ghwcfg1 = DT_INST_PROP (0 , ghwcfg1 ),
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