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ajf58kartben
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drivers: clock_control: rpi_pico: Correct bitfields during init
RESETS_RESET_PLL_USB_BITS was logically or'd twice and 'unreset'ting PWM doesn't seem to be required, based on the contents of the SDK. Signed-off-by: Andrew Featherstone <[email protected]>
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drivers/clock_control/clock_control_rpi_pico.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -608,14 +608,13 @@ static int clock_control_rpi_pico_init(const struct device *dev)
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/* Reset all function before clock configuring */
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reset_block(~(RESETS_RESET_IO_QSPI_BITS | RESETS_RESET_PADS_QSPI_BITS |
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RESETS_RESET_PLL_USB_BITS | RESETS_RESET_USBCTRL_BITS |
611-
RESETS_RESET_PLL_USB_BITS | RESETS_RESET_SYSCFG_BITS |
612-
RESETS_RESET_PLL_SYS_BITS));
611+
RESETS_RESET_SYSCFG_BITS | RESETS_RESET_PLL_SYS_BITS));
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unreset_block_wait(RESETS_RESET_BITS &
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~(RESETS_RESET_ADC_BITS | RESETS_RESET_RTC_BITS |
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RESETS_RESET_SPI0_BITS | RESETS_RESET_SPI1_BITS |
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RESETS_RESET_UART0_BITS | RESETS_RESET_UART1_BITS |
618-
RESETS_RESET_USBCTRL_BITS | RESETS_RESET_PWM_BITS));
617+
RESETS_RESET_USBCTRL_BITS));
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/* Start tick in watchdog */
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watchdog_hw->tick = ((CLOCK_FREQ_xosc/1000000) | WATCHDOG_TICK_ENABLE_BITS);

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