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board: Add 'egis_et171' dev board
This is a development board for Egis et171 SOC. It has basic peripherals such as GPIO, I2C, SPI,.. etc and built-in USB. Signed-off-by: Jacky Lee <[email protected]>
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# Copyright (c) 2025 Egis Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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DT_CHOSEN_Z_FLASH := zephyr,flash
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_FLASH))
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# Copyright (c) 2025 Egis Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_EGIS_ET171
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select SOC_EGIS_ET171

boards/egis/egis_et171/board.cmake

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#
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# Copyright (c) 2025 Egis Technology Inc.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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cmake_minimum_required(VERSION 3.20.0)
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# To get more info about flashing, please contect https://www.egistec.com
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# You must set the private key of the secure boot upgrade from env.
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set(EGIS_FW_KEY $ENV{egis_fw_key})
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# You can provider extension arguments for flashing firmware from env.
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set(EXT_ARG $ENV{et171_fw_upgrade_ext_arg})
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find_program(ET171_FLASHER NAMES et171_fw_upgrade)
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board_set_flasher_ifnset(misc-flasher)
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board_finalize_runner_args(misc-flasher
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${ET171_FLASHER}
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${EXT_ARG}
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-SCAK=${EGIS_FW_KEY}
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-FW="${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.bin"
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)

boards/egis/egis_et171/board.yml

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board:
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name: egis_et171
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full_name: ET171 Development Board
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vendor: egis
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socs:
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- name: et171
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.. zephyr:board:: egis_et171
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Overview
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********
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The et171 development board is used for development and verification,
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and can be used for application development through interfaces such
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as UART, GPIO, SPI, and I2C.
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Hardware
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********
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The platform provides following hardware components:
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- 32-bit RISC-V CPU
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- 384KB embedded SDRAM
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- UART
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- I2C
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- SPI
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- GPIO
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- PWM
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- DMA
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- USB
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.. figure:: img/et171_snapshot.webp
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:align: center
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:alt: EGIS_ET171_SOC
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Connections and IOs
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===================
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The et171 platform has 1 GPIO controller. It providing 17 bits of IO.
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It is responsible for pin input/output, pull-up, etc.
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The et171 platform has 3 SPI controllers, 2 of which can
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additionally support QSPI and XIP mode.
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The et171 platform has one USB 2.0 controller that supports up to
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USB 2.0 high-speed mode.
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Except USB DP/DM, all et171 peripheral I/O devices are mapped to 31
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I/O pins through the multiplexer controller.
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System Clock
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------------
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The et171 platform has a multi-stage frequency divider with a maximum
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speed of 200 MHz.
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Programming and debugging
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*************************
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.. zephyr:board-supported-runners::
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The et171 is compatible with Andes ae350, so you can use Andes ICE
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for debugging. For debugging zephyr applications or upload them into
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a RAM, you will need to connect ICE from host computer to et171 board
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and execute the ICE management software, ICEman, on this host computer.
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Connecting Andes ICE (AICE)
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===========================
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AICE is used for debugging and uploading RAM code to the board.
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Building
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========
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You can build applications in the usual way. Here is an example for
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the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: egis_et171
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:goals: build
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Flashing
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========
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Since this is a B2B prototype, there is no publicly available
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flashing tool. If you have any development needs, please contact
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the contact window of `Egis Technology Inc. <https://www.egistec.com/>`_
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.
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If you has a debugger (`AICE-MICRO`_) with ICEman (`Andes Development Kit`_)
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, set the ``CONFIG_XIP=n`` to enable running the program in RAM mode via
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the ICE debugger.
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At first, you should run ICEman before load program.
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.. code-block:: console
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# Enable execute file permission of ICEman
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$ chmod a+x ./ICEman
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# Running the ICEman server
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$ sudo ./ICEman -Z v5
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.. code-block:: console
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# When your ICEman server is running
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# You can load the program into RAM and execute it via gdb
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$ riscv64-zephyr-elf-gdb build/zephyr/zephyr.elf
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(gdb) target remote :1111
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(gdb) monitor reset halt
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(gdb) load
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(gdb) quit
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References
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**********
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.. target-notes::
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.. _AICE-MICRO: http://www.andestech.com/en/products-solutions/andeshape-platforms/aice-micro/
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.. _Andes Development Kit: https://github.com/andestech/Andes-Development-Kit/releases
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/*
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* Copyright (c) 2025 Egis Technology Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <egis/egis_et171.dtsi>
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/ {
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model = "Egis ET171C";
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compatible = "egis,egis_et171";
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aliases {
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watchdog0 = &wdt;
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led0 = &gpio_led0;
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led1 = &gpio_led1;
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gpio-0 = &gpio0;
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counter-0 = &pit0;
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};
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,sram = &sram;
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zephyr,flash = &flash0;
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};
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leds {
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compatible = "gpio-leds";
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gpio_led0: led0 {
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label = "LED0";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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};
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gpio_led1: led1 {
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label = "LED1";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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};
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};
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flash0: flash@80000000 {
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compatible = "soc-nv-flash";
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reg = <0x80000000 DT_SIZE_K(1024)>;
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};
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clocks {
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clk_mtimer: clk_mtimer {
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compatible = "fixed-clock";
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clock-frequency = <18037518>;
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status = "disabled";
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};
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};
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};
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&plic0 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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clock-frequency = <18037518>;
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current-speed = <38400>;
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};
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&gpio0 {
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status = "okay";
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};
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&pit0 {
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status = "okay";
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};
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&dma0 {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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identifier: egis_et171
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name: Egis ET171
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type: mcu
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arch: riscv
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toolchain:
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- zephyr
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- cross-compile
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ram: 384
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supported:
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- gpio
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- counter
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- flash
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- watchdog
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testing:
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ignore_tags:
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- bluetooth
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- spi
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- usb
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_GPIO=y

boards/egis/index.rst

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.. _boards-egis:
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Egis Technology Inc.
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####################
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.. toctree::
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:maxdepth: 1
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:glob:
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**/*

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