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Jacky Leekartben
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driver: Reuse andes_cache driver for compatible MCUs
Fixed a wrong function declare of 'nds_l2_cache_init'. Replace `SOC_FAMILY_ANDES_V5` with `DT_HAS_ANDESTECH_ANDESCORE_V5_ENABLED` condition to enable it to be used by compatible MCUs Signed-off-by: Jacky Lee <[email protected]>
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drivers/cache/Kconfig.andes

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,10 +5,10 @@
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config CACHE_ANDES
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bool "ANDES external cache driver"
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default y
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depends on SOC_FAMILY_ANDES_V5
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depends on DT_HAS_ANDESTECH_ANDESCORE_V5_ENABLED
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select CACHE_HAS_DRIVER
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help
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This option enables the CACHE driver for ANDES V5 series SOC.
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This option enables the CACHE driver for SoC based on Andes V5 core.
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if CACHE_ANDES
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drivers/cache/cache_andes.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ static ALWAYS_INLINE void nds_l2_cache_disable(void) { }
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static ALWAYS_INLINE int nds_l2_cache_range(void *addr, size_t size, int op) { return 0; }
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static ALWAYS_INLINE int nds_l2_cache_all(int op) { return 0; }
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static ALWAYS_INLINE int nds_l2_cache_is_inclusive(void) { return 0; }
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static ALWAYS_INLINE int nds_l2_cache_init(void) { return 0; }
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static ALWAYS_INLINE int nds_l2_cache_init(uint8_t line_size) { return 0; }
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#endif /* DT_NODE_HAS_COMPAT_STATUS(DT_INST(0, andestech_l2c), andestech_l2c, okay) */
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static ALWAYS_INLINE int nds_cctl_range_operations(void *addr, size_t size, int line_size, int cmd)

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