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board: frdm_mcxn236: Enable PDM on frdm_mcxn236
Enable PDM on frdm_mcxn236 board. Signed-off-by: Zhaoxiang Jin <[email protected]>
1 parent c52c9c7 commit 3e9bcc3

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4 files changed

+68
-3
lines changed

4 files changed

+68
-3
lines changed

boards/nxp/frdm_mcxn236/board.c

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright 2024 NXP
2+
* Copyright 2024-2025 NXP
33
* SPDX-License-Identifier: Apache-2.0
44
*/
55
#include <zephyr/init.h>
@@ -103,15 +103,18 @@ void board_early_init_hook(void)
103103

104104
CLOCK_SetupExtClocking(BOARD_XTAL0_CLK_HZ);
105105

106-
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai1))
106+
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai0)) || \
107+
DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai1)) || \
108+
DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pdm))
107109
/* < Set up PLL1 */
108110
const pll_setup_t pll1_Setup = {
109111
.pllctrl = SCG_SPLLCTRL_SOURCE(1U) | SCG_SPLLCTRL_SELI(3U) |
110112
SCG_SPLLCTRL_SELP(1U),
111113
.pllndiv = SCG_SPLLNDIV_NDIV(25U),
112114
.pllpdiv = SCG_SPLLPDIV_PDIV(10U),
113115
.pllmdiv = SCG_SPLLMDIV_MDIV(256U),
114-
.pllRate = 24576000U};
116+
.pllRate = 24576000U
117+
};
115118

116119
/* Configure PLL1 to the desired values */
117120
CLOCK_SetPLL1Freq(&pll1_Setup);
@@ -339,6 +342,11 @@ void board_early_init_hook(void)
339342
CLOCK_EnableClock(kCLOCK_Sai1);
340343
#endif
341344

345+
#if DT_NODE_HAS_STATUS(DT_NODELABEL(pdm), okay)
346+
CLOCK_SetClkDiv(kCLOCK_DivMicfilFClk, 1U);
347+
CLOCK_AttachClk(kPLL1_CLK0_to_MICFILF);
348+
#endif
349+
342350
/* Set SystemCoreClock variable. */
343351
SystemCoreClock = CLOCK_INIT_CORE_CLOCK;
344352
}

boards/nxp/frdm_mcxn236/frdm_mcxn236-pinctrl.dtsi

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -233,4 +233,14 @@
233233
input-enable;
234234
};
235235
};
236+
237+
pinmux_pdm: pinmux_pdm {
238+
group0 {
239+
pinmux = <PDM0_CLK_PIO0_16>,
240+
<PDM0_DATA0_PIO0_17>;
241+
drive-strength = "high";
242+
slew-rate = "fast";
243+
input-enable;
244+
};
245+
};
236246
};

boards/nxp/frdm_mcxn236/frdm_mcxn236.dts

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -427,3 +427,8 @@ dvp_20pin_interface: &video_sdma {};
427427
pinctrl-0 = <&pinmux_sai1>;
428428
pinctrl-names = "default";
429429
};
430+
431+
&pdm {
432+
pinctrl-0 = <&pinmux_pdm>;
433+
pinctrl-names = "default";
434+
};

dts/arm/nxp/nxp_mcxn23x_common.dtsi

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -985,6 +985,48 @@
985985
nxp,rx-dma-channel = <3>;
986986
status = "disabled";
987987
};
988+
989+
pdm: pdm@10c000 {
990+
compatible = "nxp,pdm";
991+
#address-cells = <1>;
992+
#size-cells = <0>;
993+
interrupts = <48 0>;
994+
reg = <0x10c000 0x1000>;
995+
clocks = <&syscon MCUX_PDM_CLK>;
996+
status = "disabled";
997+
quality-mode = <1>;
998+
cic-decimation-rate = <0>;
999+
fifo-watermark = <4>;
1000+
sample-rate = <16000>;
1001+
1002+
channel0: pdm-channel@0 {
1003+
reg = <0>;
1004+
status = "disabled";
1005+
dc-remover-cutoff-freq = <2>;
1006+
decimation-filter-gain = <5>;
1007+
};
1008+
1009+
channel1: pdm-channel@1 {
1010+
reg = <1>;
1011+
status = "disabled";
1012+
dc-remover-cutoff-freq = <2>;
1013+
decimation-filter-gain = <5>;
1014+
};
1015+
1016+
channel2: pdm-channel@2 {
1017+
reg = <2>;
1018+
status = "disabled";
1019+
dc-remover-cutoff-freq = <2>;
1020+
decimation-filter-gain = <5>;
1021+
};
1022+
1023+
channel3: pdm-channel@3 {
1024+
reg = <3>;
1025+
status = "disabled";
1026+
dc-remover-cutoff-freq = <2>;
1027+
decimation-filter-gain = <5>;
1028+
};
1029+
};
9881030
};
9891031

9901032
&systick {

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