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arch: arm: Add unified floating-point configuration symbols
This commit adds the unified floating-point configuration symbols for the ARM architectures. These configuration symbols allow specification of the floating-point coprocessors, such as VFP (also known as FP for Cortex-M) and NEON, for the ARM architectures. Signed-off-by: Stephanos Ioannidis <[email protected]>
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‎arch/arm/Kconfig‎

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@@ -55,5 +55,6 @@ config CODE_DATA_RELOCATION_SRAM
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relocation.
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rsource "core/aarch32/Kconfig"
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rsource "core/aarch32/Kconfig.vfp"
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‎arch/arm/core/aarch32/Kconfig.vfp‎

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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2022 Lexmark International, Inc.
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# ARM architecture VFP configuration options
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# Math coprocessor symbols; these should be selected by the CPU symbol to
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# indicate that the CPU core can be configured with the specified
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# coprocessor(s).
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config CPU_HAS_VFP
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bool
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select CPU_HAS_FPU
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help
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This option signifies the support for a Vectored Floating-Point (VFP)
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coprocessor.
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config CPU_HAS_NEON
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bool
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select CPU_HAS_FPU
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help
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This option signifies the support for a NEON (Advanced SIMD) coprocessor.
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# VFP type symbols; these should be selected by the SoC symbol to specify the
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# type of the VFP core instantiated by the SoC.
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config VFP_SP_D16
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_REGS_S32_D16
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports only single-precision operations with 16 double-word
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registers.
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config VFP_SP_D16_FP16
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_HALF_PRECISION
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_REGS_S32_D16
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports half- and single-precision operations with 16
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double-word registers.
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config VFP_SP_D16_FP16_FMAC
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_HALF_PRECISION
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_FMAC
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select VFP_FEATURE_REGS_S32_D16
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports half- and single-precision operations (including fused
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multiply-accumulate) with 16 double-word registers.
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config VFP_DP_D16
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_DOUBLE_PRECISION
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select VFP_FEATURE_REGS_S32_D16
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports single- and double-precision operations with 16
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double-word registers.
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config VFP_DP_D16_FP16
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_HALF_PRECISION
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_DOUBLE_PRECISION
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select VFP_FEATURE_REGS_S32_D16
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports half-, single- and double-precision operations with 16
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double-word registers.
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config VFP_DP_D16_FP16_FMAC
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_HALF_PRECISION
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_DOUBLE_PRECISION
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select VFP_FEATURE_FMAC
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select VFP_FEATURE_REGS_S32_D16
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports half-, single- and double-precision operations
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(including fused multiply-accumulate) with 16 double-word registers.
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config VFP_U_DP_D16_FP16_FMAC
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_HALF_PRECISION
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_DOUBLE_PRECISION
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select VFP_FEATURE_FMAC
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select VFP_FEATURE_REGS_S32_D16
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select VFP_FEATURE_TRAP
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports half-, single-, double-precision operations (including
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fused multiply-accumulate) and floating-point exception trapping with 16
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double-word registers.
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config VFP_DP_D32_FP16_FMAC
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_HALF_PRECISION
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_DOUBLE_PRECISION
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select VFP_FEATURE_FMAC
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select VFP_FEATURE_REGS_S64_D32
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports half-, single- and double-precision operations
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(including fused multiply-accumulate) with 32 double-word registers.
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config VFP_U_DP_D32_FP16_FMAC
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bool
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select CPU_HAS_VFP
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select VFP_FEATURE_HALF_PRECISION
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select VFP_FEATURE_SINGLE_PRECISION
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select VFP_FEATURE_DOUBLE_PRECISION
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select VFP_FEATURE_FMAC
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select VFP_FEATURE_REGS_S64_D32
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select VFP_FEATURE_TRAP
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help
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This option signifies the use of a VFP floating-point coprocessor
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that supports half-, single-, double-precision operations (including
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fused multiply-accumulate) and floating-point exception trapping with 32
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double-word registers.
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if CPU_HAS_VFP
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# VFP feature symbols; these are the helper symbols used by the floating-point
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# support code to resolve the supported VFP features.
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config VFP_FEATURE_HALF_PRECISION
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bool
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help
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This option signifies that the VFP coprocessor supports
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half-precision operations (half-precision extension).
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config VFP_FEATURE_SINGLE_PRECISION
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bool
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help
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This option signifies that the VFP coprocessor supports
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single-precision operations.
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config VFP_FEATURE_DOUBLE_PRECISION
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bool
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help
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This option signifies that the VFP coprocessor supports
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double-precision operations.
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config VFP_FEATURE_VECTOR
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bool
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help
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This option signifies that the VFP coprocessor supports vector
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operations.
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config VFP_FEATURE_FMAC
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bool
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help
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This option signifies that the VFP coprocessor supports the fused
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multiply-accumulate operations.
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config VFP_FEATURE_REGS_S32_D16
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bool
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help
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This option signifies that the VFP coprocessor implements 16
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double-precision (32 single-precision) floating-point registers.
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config VFP_FEATURE_REGS_S64_D32
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bool
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help
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This option signifies that the VFP coprocessor implements 32
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double-precision (64 single-precision) floating-point registers.
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config VFP_FEATURE_TRAP
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bool
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help
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This option signifies that the VFP coprocessor supports the trapping
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of floating-point exceptions to allow software implementation of
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the unsupported VFP instructions.
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endif # CPU_HAS_VFP
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# Advanced SIMD type symbols; these should be selected by the SoC symbol to
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# specify the type of the VFP core instantiated by the SoC.
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config NEON
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bool
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select CPU_HAS_NEON
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help
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This option signifies the use of a NEON Advanced SIMD coprocessor.

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