arch: arm: core: aarch32: introduce basic ARMv7 MMU support

An initial implementation for memory management using the ARMv7 MMU.
A single L1 translation table for the whole 4 GB address space is al-
ways present, a configurable number of L2 page tables are linked to
the L1 table based on the static memory area configuration at boot
time, or whenever arch_mem_map/arch_mem_unmap are called at run-time.

Currently, a CPU with the Multiprocessor Extensions and execution at
PL1 are always assumed. Userspace-related features or thread stack
guard pages are not yet supported. Neither are LPAE, PXN or TEX re-
mapping. All mappings are currently assigned to the same domain. Re-
garding the permissions model, access permissions are specified using
the AP[2:1] model rather than the older AP[2:0] model, which, accor-
ding to ARM's documentation, is deprecated and should no longer be
used. The newer model adds some complexity when it comes to mapping
pages as unaccessible (the AP[2:1] model doesn't support explicit
specification of "no R, no W" permissions, it's always at least "RO"),
this is accomplished by invalidating the ID bits of the respective
page's PTE.

Includes sources, Kconfig integration, adjusted CMakeLists and the
modified linker command file (proper section alignment!).

Signed-off-by: Immo Birnbaum <[email protected]>

Author: ibirnbaum

arch/arm/core/aarch32/CMakeLists.txt

@@ -27,6 +27,7 @@ add_subdirectory_ifdef(CONFIG_ARM_SECURE_FIRMWARE cortex_m/tz)
 add_subdirectory_ifdef(CONFIG_ARM_NONSECURE_FIRMWARE cortex_m/tz)
 
 add_subdirectory_ifdef(CONFIG_ARM_MPU mpu)
+add_subdirectory_ifdef(CONFIG_ARM_AARCH32_MMU mmu)
 
 add_subdirectory_ifdef(CONFIG_CPU_CORTEX_R cortex_a_r)
 

arch/arm/core/aarch32/Kconfig

@@ -306,3 +306,4 @@ rsource "cortex_m/Kconfig"
 rsource "cortex_a_r/Kconfig"
 
 rsource "mpu/Kconfig"
+rsource "mmu/Kconfig"

arch/arm/core/aarch32/mmu/CMakeLists.txt

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+
+zephyr_library_sources(arm_mmu.c)

arch/arm/core/aarch32/mmu/Kconfig

@@ -0,0 +1,35 @@
+#
+# ARMv7 Memory Management Unit (MMU) configuration options
+#
+# Copyright (c) 2021 Weidmueller Interface GmbH & Co. KG
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if CPU_HAS_MMU
+
+config ARM_AARCH32_MMU
+	bool "ARMv7 Cortex-A MMU Support"
+	default y if CPU_AARCH32_CORTEX_A
+	select MMU
+	select SRAM_REGION_PERMISSIONS
+	select THREAD_STACK_INFO
+	select ARCH_HAS_EXECUTABLE_PAGE_BIT
+	help
+	  The current CPU has an ARMv7 Memory Management Unit.
+
+config ARM_MMU_NUM_L2_TABLES
+	depends on ARM_AARCH32_MMU
+	int "Number of L2 translation tables available to the MMU"
+	default 64
+	help
+	  Number of level 2 translation tables. Each level 2 table
+	  covers 1 MB of address space.
+
+config ARM_MMU_REGION_MIN_ALIGN_AND_SIZE
+	int
+	default 4096
+	help
+	  Minimum size (and alignment) of an ARM MMU page.
+	  This value should not be modified.
+
+endif # CPU_HAS_MMU