Skip to content

Commit 72f6260

Browse files
dabekjakubnashif
authored andcommitted
memory manager: add region calculation for virtual memory
Add region calculations and implementation of sys_mm_drv_query_memory_regions to pass calculated regions down the line. Signed-off-by: Jakub Dabek <[email protected]>
1 parent 9531f96 commit 72f6260

File tree

5 files changed

+105
-3
lines changed

5 files changed

+105
-3
lines changed

drivers/mm/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,5 +12,6 @@ zephyr_library_sources_ifdef(
1212

1313
zephyr_sources_ifdef(
1414
CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB
15+
mm_drv_intel_adsp_regions.c
1516
mm_drv_intel_adsp_mtl_tlb.c
1617
)

drivers/mm/mm_drv_intel_adsp.h

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@
2626

2727
#include <soc.h>
2828
#include <adsp_memory.h>
29+
#include <adsp_memory_regions.h>
2930

3031
#include "mm_drv_common.h"
3132

@@ -59,9 +60,6 @@ DEVICE_MMIO_TOPLEVEL_STATIC(tlb_regs, DT_DRV_INST(0));
5960
#define L2_SRAM_BANK_NUM (L2_SRAM_SIZE / SRAM_BANK_SIZE)
6061
#define IS_BIT_SET(value, idx) ((value) & (1 << (idx)))
6162

62-
/* size of TLB table */
63-
#define TLB_SIZE DT_REG_SIZE_BY_IDX(DT_INST(0, intel_adsp_mtl_tlb), 0)
64-
6563
/**
6664
* Calculate TLB entry based on physical address.
6765
*
@@ -85,4 +83,13 @@ static inline uintptr_t tlb_entry_to_pa(uint16_t tlb_entry)
8583
CONFIG_MM_DRV_PAGE_SIZE) + TLB_PHYS_BASE);
8684
}
8785

86+
/**
87+
* Calculate virtual memory regions allocation based on
88+
* info from linker script.
89+
*
90+
* @param End address of staticaly allocated memory.
91+
* @return Error Code.
92+
*/
93+
int calculate_memory_regions(uintptr_t static_alloc_end_ptr);
94+
8895
#endif /* ZEPHYR_DRIVERS_SYSTEM_MM_DRV_INTEL_MTL_ */

drivers/mm/mm_drv_intel_adsp_mtl_tlb.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -589,6 +589,10 @@ static int sys_mm_drv_mm_init(const struct device *dev)
589589

590590
L2_PHYS_SRAM_REGION.num_blocks = avalible_memory_size / CONFIG_MM_DRV_PAGE_SIZE;
591591

592+
ret = calculate_memory_regions(UNUSED_L2_START_ALIGNED);
593+
CHECKIF(ret != 0) {
594+
return ret;
595+
}
592596
/*
593597
* Initialize memblocks that will store physical
594598
* page usage. Initially all physical pages are
@@ -619,6 +623,7 @@ static int sys_mm_drv_mm_init(const struct device *dev)
619623
*/
620624
if (L2_SRAM_BASE + L2_SRAM_SIZE < UNUSED_L2_START_ALIGNED ||
621625
L2_SRAM_BASE > UNUSED_L2_START_ALIGNED) {
626+
622627
__ASSERT(false,
623628
"unused l2 pointer is outside of l2 sram range %p\n",
624629
UNUSED_L2_START_ALIGNED);
Lines changed: 62 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,62 @@
1+
/*
2+
* Copyright (c) 2022 Intel Corporation
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/**
8+
* @file
9+
* @brief Driver handling memory regions related
10+
* functions
11+
*/
12+
13+
#include "mm_drv_intel_adsp.h"
14+
15+
struct sys_mm_drv_region
16+
virtual_memory_regions[CONFIG_MP_MAX_NUM_CPUS + VIRTUAL_REGION_COUNT] = { {0} };
17+
18+
const struct sys_mm_drv_region *sys_mm_drv_query_memory_regions(void)
19+
{
20+
return (const struct sys_mm_drv_region *) virtual_memory_regions;
21+
}
22+
23+
static inline void append_region(void *address, uint32_t mem_size,
24+
uint32_t attributes, uint32_t position, uint32_t *checksum)
25+
{
26+
virtual_memory_regions[position].addr = address;
27+
virtual_memory_regions[position].size = mem_size;
28+
virtual_memory_regions[position].attr = attributes;
29+
checksum += mem_size;
30+
}
31+
32+
int calculate_memory_regions(uintptr_t static_alloc_end_ptr)
33+
{
34+
struct sys_mm_drv_region *temporary_table =
35+
(struct sys_mm_drv_region *)&virtual_memory_regions[0];
36+
37+
int i, checksum = 0;
38+
39+
for (i = 0; i < CONFIG_MP_MAX_NUM_CPUS; i++) {
40+
append_region((void *)(static_alloc_end_ptr + i * CORE_HEAP_SIZE),
41+
CORE_HEAP_SIZE, MEM_REG_ATTR_CORE_HEAP, i, &checksum);
42+
}
43+
44+
append_region((void *)((uintptr_t)
45+
virtual_memory_regions[i - 1].addr + temporary_table[i - 1].size),
46+
CORE_HEAP_SIZE, MEM_REG_ATTR_SHARED_HEAP, i, &checksum);
47+
i++;
48+
append_region((void *)((uintptr_t)
49+
virtual_memory_regions[i - 1].addr + temporary_table[i - 1].size),
50+
OPPORTUNISTIC_REGION_SIZE, MEM_REG_ATTR_OPPORTUNISTIC_MEMORY, i, &checksum);
51+
i++;
52+
/* Apending last region as 0 so iterators know where table is over
53+
* check is for size = 0;
54+
*/
55+
append_region((void *)0, 0, 0, i, &checksum);
56+
57+
if (checksum > L2_VIRTUAL_SRAM_SIZE) {
58+
return -EINVAL;
59+
}
60+
61+
return 0;
62+
}
Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
/*
2+
* Copyright (c) 2022 Intel Corporation
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
#ifndef ZEPHYR_SOC_INTEL_ADSP_MEMORY_REGIONS_H_
7+
#define ZEPHYR_SOC_INTEL_ADSP_MEMORY_REGIONS_H_
8+
9+
/* Define amount of regions other than core heaps that virtual memory will be split to
10+
* currently includes shared heap and oma region and one regions set to 0 as for table
11+
* iterator end value.
12+
*/
13+
#define VIRTUAL_REGION_COUNT 3
14+
15+
#define CORE_HEAP_SIZE 0x100000
16+
#define SHARED_HEAP_SIZE 0x100000
17+
#define OPPORTUNISTIC_REGION_SIZE 0x100000
18+
19+
/* size of TLB table */
20+
#define TLB_SIZE DT_REG_SIZE_BY_IDX(DT_INST(0, intel_adsp_mtl_tlb), 0)
21+
22+
/* Attribiutes for memory regions */
23+
#define MEM_REG_ATTR_CORE_HEAP 1U
24+
#define MEM_REG_ATTR_SHARED_HEAP 2U
25+
#define MEM_REG_ATTR_OPPORTUNISTIC_MEMORY 4U
26+
27+
#endif /* ZEPHYR_SOC_INTEL_ADSP_MEMORY_REGIONS_H_ */

0 commit comments

Comments
 (0)