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dts: nordic: nrf54h20: add nordic,clockpin-enable settings
Define which signals require CLOCKPIN enablement at SoC dts files. Signed-off-by: Gerard Marull-Paretas <[email protected]>
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-3
lines changed

4 files changed

+63
-3
lines changed

‎dts/bindings/i2c/nordic,nrf-twi-common.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44

55
# Common fields for Nordic nRF family TWI peripherals
66

7-
include: [i2c-controller.yaml, pinctrl-device.yaml]
7+
include: [i2c-controller.yaml, pinctrl-device.yaml, nordic-clockpin.yaml]
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99
properties:
1010
reg:

‎dts/bindings/serial/nordic,nrf-uart-common.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
include: [uart-controller.yaml, pinctrl-device.yaml]
1+
include: [uart-controller.yaml, pinctrl-device.yaml, nordic-clockpin.yaml]
22

33
properties:
44
reg:

‎dts/bindings/spi/nordic,nrf-spi-common.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33

44
# Common fields for Nordic nRF family SPI peripherals
55

6-
include: [spi-controller.yaml, pinctrl-device.yaml]
6+
include: [spi-controller.yaml, pinctrl-device.yaml, nordic-clockpin.yaml]
77

88
properties:
99
reg:

‎dts/common/nordic/nrf54h20.dtsi‎

Lines changed: 60 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -561,6 +561,8 @@
561561
#size-cells = <0>;
562562
rx-delay-supported;
563563
rx-delay = <1>;
564+
nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
565+
<NRF_FUN_SPIS_SCK>;
564566
};
565567

566568
uart120: uart@8e6000 {
@@ -582,6 +584,8 @@
582584
#size-cells = <0>;
583585
rx-delay-supported;
584586
rx-delay = <1>;
587+
nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
588+
<NRF_FUN_SPIS_SCK>;
585589
};
586590

587591
cpuppr_vpr: vpr@908000 {
@@ -833,6 +837,8 @@
833837
easydma-maxcnt-bits = <15>;
834838
#address-cells = <1>;
835839
#size-cells = <0>;
840+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
841+
<NRF_FUN_TWIM_SCL>;
836842
};
837843

838844
spi130: spi@9a5000 {
@@ -846,13 +852,18 @@
846852
#size-cells = <0>;
847853
rx-delay-supported;
848854
rx-delay = <1>;
855+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
856+
<NRF_FUN_SPIM_SCK>,
857+
<NRF_FUN_SPIS_MISO>,
858+
<NRF_FUN_SPIS_SCK>;
849859
};
850860

851861
uart130: uart@9a5000 {
852862
compatible = "nordic,nrf-uarte";
853863
reg = <0x9a5000 0x1000>;
854864
status = "disabled";
855865
interrupts = <421 NRF_DEFAULT_IRQ_PRIORITY>;
866+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
856867
};
857868

858869
i2c131: i2c@9a6000 {
@@ -863,6 +874,8 @@
863874
easydma-maxcnt-bits = <15>;
864875
#address-cells = <1>;
865876
#size-cells = <0>;
877+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
878+
<NRF_FUN_TWIM_SCL>;
866879
};
867880

868881
spi131: spi@9a6000 {
@@ -876,13 +889,18 @@
876889
#size-cells = <0>;
877890
rx-delay-supported;
878891
rx-delay = <1>;
892+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
893+
<NRF_FUN_SPIM_SCK>,
894+
<NRF_FUN_SPIS_MISO>,
895+
<NRF_FUN_SPIS_SCK>;
879896
};
880897

881898
uart131: uart@9a6000 {
882899
compatible = "nordic,nrf-uarte";
883900
reg = <0x9a6000 0x1000>;
884901
status = "disabled";
885902
interrupts = <422 NRF_DEFAULT_IRQ_PRIORITY>;
903+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
886904
};
887905

888906
dppic134: dppic@9b1000 {
@@ -927,6 +945,8 @@
927945
easydma-maxcnt-bits = <15>;
928946
#address-cells = <1>;
929947
#size-cells = <0>;
948+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
949+
<NRF_FUN_TWIM_SCL>;
930950
};
931951

932952
spi132: spi@9b5000 {
@@ -940,13 +960,18 @@
940960
#size-cells = <0>;
941961
rx-delay-supported;
942962
rx-delay = <1>;
963+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
964+
<NRF_FUN_SPIM_SCK>,
965+
<NRF_FUN_SPIS_MISO>,
966+
<NRF_FUN_SPIS_SCK>;
943967
};
944968

945969
uart132: uart@9b5000 {
946970
compatible = "nordic,nrf-uarte";
947971
reg = <0x9b5000 0x1000>;
948972
status = "disabled";
949973
interrupts = <437 NRF_DEFAULT_IRQ_PRIORITY>;
974+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
950975
};
951976

952977
i2c133: i2c@9b6000 {
@@ -957,6 +982,8 @@
957982
easydma-maxcnt-bits = <15>;
958983
#address-cells = <1>;
959984
#size-cells = <0>;
985+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
986+
<NRF_FUN_TWIM_SCL>;
960987
};
961988

962989
spi133: spi@9b6000 {
@@ -970,13 +997,18 @@
970997
#size-cells = <0>;
971998
rx-delay-supported;
972999
rx-delay = <1>;
1000+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1001+
<NRF_FUN_SPIM_SCK>,
1002+
<NRF_FUN_SPIS_MISO>,
1003+
<NRF_FUN_SPIS_SCK>;
9731004
};
9741005

9751006
uart133: uart@9b6000 {
9761007
compatible = "nordic,nrf-uarte";
9771008
reg = <0x9b6000 0x1000>;
9781009
status = "disabled";
9791010
interrupts = <438 NRF_DEFAULT_IRQ_PRIORITY>;
1011+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
9801012
};
9811013

9821014
dppic135: dppic@9c1000 {
@@ -1021,6 +1053,8 @@
10211053
easydma-maxcnt-bits = <15>;
10221054
#address-cells = <1>;
10231055
#size-cells = <0>;
1056+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1057+
<NRF_FUN_TWIM_SCL>;
10241058
};
10251059

10261060
spi134: spi@9c5000 {
@@ -1034,13 +1068,18 @@
10341068
#size-cells = <0>;
10351069
rx-delay-supported;
10361070
rx-delay = <1>;
1071+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1072+
<NRF_FUN_SPIM_SCK>,
1073+
<NRF_FUN_SPIS_MISO>,
1074+
<NRF_FUN_SPIS_SCK>;
10371075
};
10381076

10391077
uart134: uart@9c5000 {
10401078
compatible = "nordic,nrf-uarte";
10411079
reg = <0x9c5000 0x1000>;
10421080
status = "disabled";
10431081
interrupts = <453 NRF_DEFAULT_IRQ_PRIORITY>;
1082+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
10441083
};
10451084

10461085
i2c135: i2c@9c6000 {
@@ -1051,6 +1090,8 @@
10511090
easydma-maxcnt-bits = <15>;
10521091
#address-cells = <1>;
10531092
#size-cells = <0>;
1093+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1094+
<NRF_FUN_TWIM_SCL>;
10541095
};
10551096

10561097
spi135: spi@9c6000 {
@@ -1064,13 +1105,18 @@
10641105
#size-cells = <0>;
10651106
rx-delay-supported;
10661107
rx-delay = <1>;
1108+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1109+
<NRF_FUN_SPIM_SCK>,
1110+
<NRF_FUN_SPIS_MISO>,
1111+
<NRF_FUN_SPIS_SCK>;
10671112
};
10681113

10691114
uart135: uart@9c6000 {
10701115
compatible = "nordic,nrf-uarte";
10711116
reg = <0x9c6000 0x1000>;
10721117
status = "disabled";
10731118
interrupts = <454 NRF_DEFAULT_IRQ_PRIORITY>;
1119+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
10741120
};
10751121

10761122
dppic136: dppic@9d1000 {
@@ -1115,6 +1161,8 @@
11151161
easydma-maxcnt-bits = <15>;
11161162
#address-cells = <1>;
11171163
#size-cells = <0>;
1164+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1165+
<NRF_FUN_TWIM_SCL>;
11181166
};
11191167

11201168
spi136: spi@9d5000 {
@@ -1128,13 +1176,18 @@
11281176
#size-cells = <0>;
11291177
rx-delay-supported;
11301178
rx-delay = <1>;
1179+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1180+
<NRF_FUN_SPIM_SCK>,
1181+
<NRF_FUN_SPIS_MISO>,
1182+
<NRF_FUN_SPIS_SCK>;
11311183
};
11321184

11331185
uart136: uart@9d5000 {
11341186
compatible = "nordic,nrf-uarte";
11351187
reg = <0x9d5000 0x1000>;
11361188
status = "disabled";
11371189
interrupts = <469 NRF_DEFAULT_IRQ_PRIORITY>;
1190+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
11381191
};
11391192

11401193
i2c137: i2c@9d6000 {
@@ -1145,6 +1198,8 @@
11451198
easydma-maxcnt-bits = <15>;
11461199
#address-cells = <1>;
11471200
#size-cells = <0>;
1201+
nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1202+
<NRF_FUN_TWIM_SCL>;
11481203
};
11491204

11501205
spi137: spi@9d6000 {
@@ -1158,13 +1213,18 @@
11581213
#size-cells = <0>;
11591214
rx-delay-supported;
11601215
rx-delay = <1>;
1216+
nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1217+
<NRF_FUN_SPIM_SCK>,
1218+
<NRF_FUN_SPIS_MISO>,
1219+
<NRF_FUN_SPIS_SCK>;
11611220
};
11621221

11631222
uart137: uart@9d6000 {
11641223
compatible = "nordic,nrf-uarte";
11651224
reg = <0x9d6000 0x1000>;
11661225
status = "disabled";
11671226
interrupts = <470 NRF_DEFAULT_IRQ_PRIORITY>;
1227+
nordic,clockpin-enable = <NRF_FUN_UART_TX>;
11681228
};
11691229
};
11701230
};

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