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erwangocarlescufi
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include: dt-bindings: clock: stm32f410/f427: Fix macros definition
Fix issues in macros definitions. Signed-off-by: Erwan Gouriou <[email protected]>
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-8
lines changed

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include/zephyr/dt-bindings/clock/stm32f410_clock.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -14,16 +14,16 @@
1414
/** DCKCFGR devices */
1515
#define CKDFSDM2A_SEL(val) STM32_CLOCK(val, 1, 14, DCKCFGR_REG)
1616
#define CKDFSDM1A_SEL(val) STM32_CLOCK(val, 1, 15, DCKCFGR_REG)
17-
#define SAI1A_SEL(val) STM32_CLOCK(val, 2, 20, DCKCFGR_REG)
18-
#define SAI1B_SEL(val) STM32_CLOCK(val, 2, 22, DCKCFGR_REG)
19-
#define I2S1_SEL(val) STM32_CLOCK(val, 2, 25, DCKCFGR_REG)
20-
#define I2S2_SEL(val) STM32_CLOCK(val, 2, 27, DCKCFGR_REG)
17+
#define SAI1A_SEL(val) STM32_CLOCK(val, 3, 20, DCKCFGR_REG)
18+
#define SAI1B_SEL(val) STM32_CLOCK(val, 3, 22, DCKCFGR_REG)
19+
#define I2S1_SEL(val) STM32_CLOCK(val, 3, 25, DCKCFGR_REG)
20+
#define I2S2_SEL(val) STM32_CLOCK(val, 3, 27, DCKCFGR_REG)
2121
#define CKDFSDM_SEL(val) STM32_CLOCK(val, 1, 31, DCKCFGR_REG)
2222

2323
/** DCKCFGR2 devices */
24-
#define I2CFMP1_SEL(val) STM32_CLOCK(val, 1, 22, DCKCFGR2_REG)
24+
#define I2CFMP1_SEL(val) STM32_CLOCK(val, 3, 22, DCKCFGR2_REG)
2525
#define CK48M_SEL(val) STM32_CLOCK(val, 1, 27, DCKCFGR2_REG)
2626
#define SDIO_SEL(val) STM32_CLOCK(val, 1, 28, DCKCFGR2_REG)
27-
#define LPTIM1_SEL(val) STM32_CLOCK(val, 1, 30, DCKCFGR2_REG)
27+
#define LPTIM1_SEL(val) STM32_CLOCK(val, 3, 30, DCKCFGR2_REG)
2828

2929
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32F410_CLOCK_H_ */

include/zephyr/dt-bindings/clock/stm32f427_clock.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,8 @@
1313
/** DCKCFGR devices */
1414
#define CKDFSDM2A_SEL(val) STM32_CLOCK(val, 1, 14, DCKCFGR_REG)
1515
#define CKDFSDM1A_SEL(val) STM32_CLOCK(val, 1, 15, DCKCFGR_REG)
16-
#define SAI1A_SEL(val) STM32_CLOCK(val, 2, 20, DCKCFGR_REG)
17-
#define SAI1B_SEL(val) STM32_CLOCK(val, 2, 22, DCKCFGR_REG)
16+
#define SAI1A_SEL(val) STM32_CLOCK(val, 3, 20, DCKCFGR_REG)
17+
#define SAI1B_SEL(val) STM32_CLOCK(val, 3, 22, DCKCFGR_REG)
1818
#define CLK48M_SEL(val) STM32_CLOCK(val, 1, 27, DCKCFGR_REG)
1919
#define SDMMC_SEL(val) STM32_CLOCK(val, 1, 28, DCKCFGR_REG)
2020
#define DSI_SEL(val) STM32_CLOCK(val, 1, 29, DCKCFGR_REG)

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