Skip to content

Commit 88941a1

Browse files
Jaska Uimonencarlescufi
Jaska Uimonen
authored and
carlescufi
committed
drivers: dai: intel: dmic: add cavs15 and 25 support
Add support for older platforms like cavs15 and 25 into intel dmic dai. Signed-off-by: Jaska Uimonen <[email protected]>
1 parent c9bf8ee commit 88941a1

File tree

3 files changed

+136
-1
lines changed

3 files changed

+136
-1
lines changed

‎drivers/dai/intel/dmic/dmic.c‎

Lines changed: 24 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -174,30 +174,53 @@ static void dai_dmic_irq_handler(const void *data)
174174

175175
static inline void dai_dmic_dis_clk_gating(const struct dai_intel_dmic *dmic)
176176
{
177+
#ifdef CONFIG_SOC_SERIES_INTEL_CAVS_V15
178+
uint32_t shim_reg;
179+
180+
shim_reg = sys_read32(SHIM_CLKCTL) | SHIM_CLKCTL_DMICFDCGB;
181+
182+
sys_write32(shim_reg, SHIM_CLKCTL);
183+
184+
LOG_INF("dis-dmic-clk-gating CLKCTL %08x", shim_reg);
185+
#else
177186
/* Disable DMIC clock gating */
178187
sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) | DMIC_DCGD),
179188
dmic->shim_base + DMICLCTL_OFFSET);
189+
#endif
180190
}
181191

182192
static inline void dai_dmic_en_clk_gating(const struct dai_intel_dmic *dmic)
183193
{
194+
#ifdef CONFIG_SOC_SERIES_INTEL_CAVS_V15
195+
uint32_t shim_reg;
196+
197+
shim_reg = sys_read32(SHIM_CLKCTL) & ~SHIM_CLKCTL_DMICFDCGB;
198+
199+
sys_write32(shim_reg, SHIM_CLKCTL);
200+
201+
LOG_INF("en-dmic-clk-gating CLKCTL %08x", shim_reg);
202+
#else
184203
/* Enable DMIC clock gating */
185204
sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) & ~DMIC_DCGD),
186205
dmic->shim_base + DMICLCTL_OFFSET);
206+
#endif
187207
}
188208

189209
static inline void dai_dmic_en_power(const struct dai_intel_dmic *dmic)
190210
{
211+
#ifndef CONFIG_SOC_SERIES_INTEL_CAVS_V15
191212
/* Enable DMIC power */
192213
sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) | DMICLCTL_SPA),
193214
dmic->shim_base + DMICLCTL_OFFSET);
194-
215+
#endif
195216
}
196217
static inline void dai_dmic_dis_power(const struct dai_intel_dmic *dmic)
197218
{
219+
#ifndef CONFIG_SOC_SERIES_INTEL_CAVS_V15
198220
/* Disable DMIC power */
199221
sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) & (~DMICLCTL_SPA)),
200222
dmic->shim_base + DMICLCTL_OFFSET);
223+
#endif
201224
}
202225

203226
static int dai_dmic_probe(struct dai_intel_dmic *dmic)

‎drivers/dai/intel/dmic/dmic.h‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,13 @@
5757
#define TS_LOCAL_OFFS_FRM GET_BITS(15, 12)
5858
#define TS_LOCAL_OFFS_CLK GET_BITS(11, 0)
5959

60+
#ifdef CONFIG_SOC_SERIES_INTEL_CAVS_V15
61+
/* Clock control */
62+
#define SHIM_CLKCTL 0x78
63+
/* DMIC Force Dynamic Clock Gating */
64+
#define SHIM_CLKCTL_DMICFDCGB BIT(24)
65+
#endif
66+
6067
/* Digital Mic Shim Registers */
6168
#define DMICLCTL_OFFSET 0x04
6269
#define DMICIPPTR_OFFSET 0x08
@@ -155,7 +162,11 @@
155162
#define OUTCONTROL0_FCI(x) SET_BIT(24, x)
156163
#define OUTCONTROL0_BFTH(x) SET_BITS(23, 20, x)
157164
#define OUTCONTROL0_OF(x) SET_BITS(19, 18, x)
165+
#ifdef CONFIG_SOC_SERIES_INTEL_ACE
158166
#define OUTCONTROL0_IPM(x) SET_BITS(17, 15, x)
167+
#else
168+
#define OUTCONTROL0_IPM(x) SET_BITS(17, 16, x)
169+
#endif
159170
#define OUTCONTROL0_IPM_SOURCE_1(x) SET_BITS(14, 13, x)
160171
#define OUTCONTROL0_IPM_SOURCE_2(x) SET_BITS(12, 11, x)
161172
#define OUTCONTROL0_IPM_SOURCE_3(x) SET_BITS(10, 9, x)
@@ -168,7 +179,11 @@
168179
#define OUTCONTROL0_FCI_GET(x) GET_BIT(24, x)
169180
#define OUTCONTROL0_BFTH_GET(x) GET_BITS(23, 20, x)
170181
#define OUTCONTROL0_OF_GET(x) GET_BITS(19, 18, x)
182+
#ifdef CONFIG_SOC_SERIES_INTEL_ACE
171183
#define OUTCONTROL0_IPM_GET(x) GET_BITS(17, 15, x)
184+
#else
185+
#define OUTCONTROL0_IPM_GET(x) GET_BITS(17, 16, x)
186+
#endif
172187
#define OUTCONTROL0_IPM_SOURCE_1_GET(x) GET_BITS(14, 13, x)
173188
#define OUTCONTROL0_IPM_SOURCE_2_GET(x) GET_BITS(12, 11, x)
174189
#define OUTCONTROL0_IPM_SOURCE_3_GET(x) GET_BITS(10, 9, x)
@@ -187,7 +202,11 @@
187202
#define OUTCONTROL1_FCI(x) SET_BIT(24, x)
188203
#define OUTCONTROL1_BFTH(x) SET_BITS(23, 20, x)
189204
#define OUTCONTROL1_OF(x) SET_BITS(19, 18, x)
205+
#ifdef CONFIG_SOC_SERIES_INTEL_ACE
190206
#define OUTCONTROL1_IPM(x) SET_BITS(17, 15, x)
207+
#else
208+
#define OUTCONTROL1_IPM(x) SET_BITS(17, 16, x)
209+
#endif
191210
#define OUTCONTROL1_IPM_SOURCE_1(x) SET_BITS(14, 13, x)
192211
#define OUTCONTROL1_IPM_SOURCE_2(x) SET_BITS(12, 11, x)
193212
#define OUTCONTROL1_IPM_SOURCE_3(x) SET_BITS(10, 9, x)
@@ -200,7 +219,11 @@
200219
#define OUTCONTROL1_FCI_GET(x) GET_BIT(24, x)
201220
#define OUTCONTROL1_BFTH_GET(x) GET_BITS(23, 20, x)
202221
#define OUTCONTROL1_OF_GET(x) GET_BITS(19, 18, x)
222+
#ifdef CONFIG_SOC_SERIES_INTEL_ACE
203223
#define OUTCONTROL1_IPM_GET(x) GET_BITS(17, 15, x)
224+
#else
225+
#define OUTCONTROL1_IPM_GET(x) GET_BITS(17, 16, x)
226+
#endif
204227
#define OUTCONTROL1_IPM_SOURCE_1_GET(x) GET_BITS(14, 13, x)
205228
#define OUTCONTROL1_IPM_SOURCE_2_GET(x) GET_BITS(12, 11, x)
206229
#define OUTCONTROL1_IPM_SOURCE_3_GET(x) GET_BITS(10, 9, x)

‎drivers/dai/intel/dmic/dmic_nhlt.c‎

Lines changed: 89 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ static inline void dai_dmic_write(const struct dai_intel_dmic *dmic,
3030
sys_write32(val, dmic->reg_base + reg);
3131
}
3232

33+
#ifdef CONFIG_SOC_SERIES_INTEL_ACE
3334
static int dai_ipm_source_to_enable(struct dai_intel_dmic *dmic,
3435
struct nhlt_pdm_ctrl_cfg **pdm_cfg,
3536
int *count, int pdm_count, int stereo,
@@ -122,6 +123,86 @@ static int dai_nhlt_dmic_dai_params_get(struct dai_intel_dmic *dmic,
122123

123124
return 0;
124125
}
126+
#else
127+
static int dai_nhlt_dmic_dai_params_get(struct dai_intel_dmic *dmic,
128+
int32_t *outcontrol,
129+
struct nhlt_pdm_ctrl_cfg **pdm_cfg,
130+
struct nhlt_pdm_ctrl_fir_cfg **fir_cfg)
131+
{
132+
int fir_stereo[2];
133+
int mic_swap;
134+
135+
switch (OUTCONTROL0_OF_GET(outcontrol[dmic->dai_config_params.dai_index])) {
136+
case 0:
137+
case 1:
138+
dmic->dai_config_params.format = DAI_DMIC_FRAME_S16_LE;
139+
break;
140+
case 2:
141+
dmic->dai_config_params.format = DAI_DMIC_FRAME_S32_LE;
142+
break;
143+
default:
144+
LOG_ERR("nhlt_dmic_dai_params_get(): Illegal OF bit field");
145+
return -EINVAL;
146+
}
147+
148+
switch (OUTCONTROL0_IPM_GET(outcontrol[dmic->dai_config_params.dai_index])) {
149+
case 0:
150+
if (!fir_cfg[0])
151+
return -EINVAL;
152+
153+
fir_stereo[0] = FIR_CONTROL_A_STEREO_GET(fir_cfg[0]->fir_control);
154+
if (fir_stereo[0]) {
155+
dmic->dai_config_params.channels = 2;
156+
dmic->enable[0] = 0x3; /* PDM0 MIC A and B */
157+
dmic->enable[1] = 0x0; /* PDM1 none */
158+
159+
} else {
160+
dmic->dai_config_params.channels = 1;
161+
mic_swap = MIC_CONTROL_PDM_CLK_EDGE_GET(pdm_cfg[0]->mic_control);
162+
dmic->enable[0] = mic_swap ? 0x2 : 0x1; /* PDM0 MIC B or MIC A */
163+
dmic->enable[1] = 0x0; /* PDM1 */
164+
}
165+
break;
166+
case 1:
167+
if (!fir_cfg[1])
168+
return -EINVAL;
169+
170+
fir_stereo[1] = FIR_CONTROL_A_STEREO_GET(fir_cfg[1]->fir_control);
171+
if (fir_stereo[1]) {
172+
dmic->dai_config_params.channels = 2;
173+
dmic->enable[0] = 0x0; /* PDM0 none */
174+
dmic->enable[1] = 0x3; /* PDM1 MIC A and B */
175+
} else {
176+
dmic->dai_config_params.channels = 1;
177+
dmic->enable[0] = 0x0; /* PDM0 none */
178+
mic_swap = MIC_CONTROL_PDM_CLK_EDGE_GET(pdm_cfg[1]->mic_control);
179+
dmic->enable[1] = mic_swap ? 0x2 : 0x1; /* PDM1 MIC B or MIC A */
180+
}
181+
break;
182+
case 2:
183+
if (!fir_cfg[0] || !fir_cfg[0])
184+
return -EINVAL;
185+
186+
fir_stereo[0] = FIR_CONTROL_A_STEREO_GET(fir_cfg[0]->fir_control);
187+
fir_stereo[1] = FIR_CONTROL_A_STEREO_GET(fir_cfg[1]->fir_control);
188+
if (fir_stereo[0] == fir_stereo[1]) {
189+
dmic->dai_config_params.channels = 4;
190+
dmic->enable[0] = 0x3; /* PDM0 MIC A and B */
191+
dmic->enable[1] = 0x3; /* PDM1 MIC A and B */
192+
LOG_INF("nhlt_dmic_dai_params_get(): set 4ch pdm0 and pdm1");
193+
} else {
194+
LOG_ERR("nhlt_dmic_dai_params_get(): Illegal 4ch configuration");
195+
return -EINVAL;
196+
}
197+
break;
198+
default:
199+
LOG_ERR("nhlt_dmic_dai_params_get(): Illegal OF bit field");
200+
return -EINVAL;
201+
}
202+
203+
return 0;
204+
}
205+
#endif
125206

126207
int dai_dmic_set_config_nhlt(struct dai_intel_dmic *dmic, const void *bespoke_cfg)
127208
{
@@ -148,7 +229,9 @@ int dai_dmic_set_config_nhlt(struct dai_intel_dmic *dmic, const void *bespoke_cf
148229
int comb_count;
149230
int fir_decimation, fir_shift, fir_length;
150231
int bf1, bf2, bf3, bf4, bf5, bf6, bf7, bf8;
232+
#ifdef CONFIG_SOC_SERIES_INTEL_ACE
151233
int bf9, bf10, bf11, bf12, bf13;
234+
#endif
152235
int bfth;
153236
int ret;
154237
int p_mcic = 0;
@@ -201,6 +284,7 @@ int dai_dmic_set_config_nhlt(struct dai_intel_dmic *dmic, const void *bespoke_cf
201284
return -EINVAL;
202285
}
203286

287+
#ifdef CONFIG_SOC_SERIES_INTEL_ACE
204288
bf9 = OUTCONTROL0_IPM_SOURCE_1_GET(val);
205289
bf10 = OUTCONTROL0_IPM_SOURCE_2_GET(val);
206290
bf11 = OUTCONTROL0_IPM_SOURCE_3_GET(val);
@@ -214,6 +298,11 @@ int dai_dmic_set_config_nhlt(struct dai_intel_dmic *dmic, const void *bespoke_cf
214298
OUTCONTROL0_IPM_SOURCE_2(bf10) | OUTCONTROL0_IPM_SOURCE_3(bf11) |
215299
OUTCONTROL0_IPM_SOURCE_4(bf12) | OUTCONTROL0_TH(bf8) |
216300
OUTCONTROL0_IPM_SOURCE_MODE(bf13);
301+
#else
302+
ref = OUTCONTROL0_TIE(bf1) | OUTCONTROL0_SIP(bf2) | OUTCONTROL0_FINIT(bf3) |
303+
OUTCONTROL0_FCI(bf4) | OUTCONTROL0_BFTH(bf5) | OUTCONTROL0_OF(bf6) |
304+
OUTCONTROL0_IPM(bf7) | OUTCONTROL0_TH(bf8);
305+
#endif
217306
if (ref != val) {
218307
LOG_ERR("dmic_set_config_nhlt(): illegal OUTCONTROL%d = 0x%08x",
219308
n, val);

0 commit comments

Comments
 (0)