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smalaekartben
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drivers: dma: siwx91x: Integrate dma_context features
Refactored the driver code to ensure compatibility with the dma_context API, improving maintainability and consistency with other DMA drivers in the Zephyr project. Signed-off-by: Sai Santhosh Malae <[email protected]>
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drivers/dma/dma_silabs_siwx91x.c

Lines changed: 18 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,6 @@ enum {
3232

3333
struct dma_siwx91x_config {
3434
UDMA0_Type *reg; /* UDMA register base address */
35-
uint8_t channels; /* UDMA channel count */
3635
uint8_t irq_number; /* IRQ number */
3736
RSI_UDMA_DESC_T *sram_desc_addr; /* SRAM Address for UDMA Descriptor Storage */
3837
const struct device *clock_dev;
@@ -41,6 +40,7 @@ struct dma_siwx91x_config {
4140
};
4241

4342
struct dma_siwx91x_data {
43+
struct dma_context dma_ctx;
4444
UDMA_Channel_Info *chan_info;
4545
dma_callback_t dma_callback; /* User callback */
4646
void *cb_data; /* User callback data */
@@ -187,13 +187,12 @@ static int siwx91x_channel_config(const struct device *dev, RSI_UDMA_HANDLE_T ud
187187
static int siwx91x_dma_configure(const struct device *dev, uint32_t channel,
188188
struct dma_config *config)
189189
{
190-
const struct dma_siwx91x_config *cfg = dev->config;
191190
struct dma_siwx91x_data *data = dev->data;
192191
void *udma_handle = &data->udma_handle;
193192
int status;
194193

195194
/* Expecting a fixed channel number between 0-31 for dma0 and 0-11 for ulpdma */
196-
if (channel >= cfg->channels) {
195+
if (channel >= data->dma_ctx.dma_channels) {
197196
return -EINVAL;
198197
}
199198

@@ -216,6 +215,8 @@ static int siwx91x_dma_configure(const struct device *dev, uint32_t channel,
216215
data->dma_callback = config->dma_callback;
217216
data->cb_data = config->user_data;
218217

218+
atomic_set_bit(data->dma_ctx.atomic, channel);
219+
219220
return 0;
220221
}
221222

@@ -232,7 +233,7 @@ static int siwx91x_dma_reload(const struct device *dev, uint32_t channel, uint32
232233
RSI_UDMA_DESC_T *udma_table = cfg->sram_desc_addr;
233234

234235
/* Expecting a fixed channel number between 0-31 for dma0 and 0-11 for ulpdma */
235-
if (channel >= cfg->channels) {
236+
if (channel >= data->dma_ctx.dma_channels) {
236237
return -EINVAL;
237238
}
238239

@@ -283,7 +284,7 @@ static int siwx91x_dma_start(const struct device *dev, uint32_t channel)
283284
void *udma_handle = &data->udma_handle;
284285

285286
/* Expecting a fixed channel number between 0-31 for dma0 and 0-11 for ulpdma */
286-
if (channel >= cfg->channels) {
287+
if (channel >= data->dma_ctx.dma_channels) {
287288
return -EINVAL;
288289
}
289290

@@ -304,12 +305,11 @@ static int siwx91x_dma_start(const struct device *dev, uint32_t channel)
304305
/* Function to stop a DMA transfer */
305306
static int siwx91x_dma_stop(const struct device *dev, uint32_t channel)
306307
{
307-
const struct dma_siwx91x_config *cfg = dev->config;
308308
struct dma_siwx91x_data *data = dev->data;
309309
void *udma_handle = &data->udma_handle;
310310

311311
/* Expecting a fixed channel number between 0-31 for dma0 and 0-11 for ulpdma */
312-
if (channel >= cfg->channels) {
312+
if (channel >= data->dma_ctx.dma_channels) {
313313
return -EINVAL;
314314
}
315315

@@ -325,10 +325,15 @@ static int siwx91x_dma_get_status(const struct device *dev, uint32_t channel,
325325
struct dma_status *stat)
326326
{
327327
const struct dma_siwx91x_config *cfg = dev->config;
328+
struct dma_siwx91x_data *data = dev->data;
328329
RSI_UDMA_DESC_T *udma_table = cfg->sram_desc_addr;
329330

330331
/* Expecting a fixed channel number between 0-31 for dma0 and 0-11 for ulpdma */
331-
if (channel >= cfg->channels) {
332+
if (channel >= data->dma_ctx.dma_channels) {
333+
return -EINVAL;
334+
}
335+
336+
if (!atomic_test_bit(data->dma_ctx.atomic, channel)) {
332337
return -EINVAL;
333338
}
334339

@@ -399,7 +404,7 @@ static void siwx91x_dma_isr(const struct device *dev)
399404

400405
channel = find_lsb_set(cfg->reg->UDMA_DONE_STATUS_REG);
401406
/* Identify the interrupt channel */
402-
if (!channel || channel > cfg->channels) {
407+
if (!channel || channel > data->dma_ctx.dma_channels) {
403408
goto out;
404409
}
405410
/* find_lsb_set() returns 1 indexed value */
@@ -438,8 +443,12 @@ static DEVICE_API(dma, siwx91x_dma_api) = {
438443
};
439444

440445
#define SIWX91X_DMA_INIT(inst) \
446+
static ATOMIC_DEFINE(dma_channels_atomic_##inst, DT_INST_PROP(inst, dma_channels)); \
441447
static UDMA_Channel_Info dma_channel_info_##inst[DT_INST_PROP(inst, dma_channels)]; \
442448
static struct dma_siwx91x_data dma_data_##inst = { \
449+
.dma_ctx.magic = DMA_MAGIC, \
450+
.dma_ctx.dma_channels = DT_INST_PROP(inst, dma_channels), \
451+
.dma_ctx.atomic = dma_channels_atomic_##inst, \
443452
.chan_info = dma_channel_info_##inst, \
444453
}; \
445454
static void siwx91x_dma_irq_configure_##inst(void) \
@@ -452,7 +461,6 @@ static DEVICE_API(dma, siwx91x_dma_api) = {
452461
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
453462
.clock_subsys = (clock_control_subsys_t)DT_INST_PHA(inst, clocks, clkid), \
454463
.reg = (UDMA0_Type *)DT_INST_REG_ADDR(inst), \
455-
.channels = DT_INST_PROP(inst, dma_channels), \
456464
.irq_number = DT_INST_PROP_BY_IDX(inst, interrupts, 0), \
457465
.sram_desc_addr = (RSI_UDMA_DESC_T *)DT_INST_PROP(inst, silabs_sram_desc_addr), \
458466
.irq_configure = siwx91x_dma_irq_configure_##inst, \

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