boards: stm32: Enable HASH peripheral for nucleo_u575zi_q

Add device tree support for STM32 HASH peripheral on the nucleo_u575zi_q

Signed-off-by: Bayrem Gharsellaoui <[email protected]>

Author: bayrem-gharsellaoui

boards/st/nucleo_u575zi_q/nucleo_u575zi_q-common.dtsi

@@ -176,6 +176,10 @@
 	status = "okay";
 };
 
+&hash {
+	status = "okay";
+};
+
 zephyr_udc0: &usbotg_fs {
 	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
 	pinctrl-names = "default";

dts/arm/st/u5/stm32u575.dtsi

@@ -7,6 +7,7 @@
 
 #include <st/u5/stm32u5_usbotg_fs.dtsi>
 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-nor-psram.h>
+#include <st/u5/stm32u5_crypt.dtsi>
 
 / {
 	sram0: memory@20000000 {

dts/arm/st/u5/stm32u5_crypt.dtsi

@@ -14,5 +14,13 @@
 			interrupts = <93 0>;
 			status = "disabled";
 		};
+
+		hash: hash@420c0400 {
+			compatible = "st,stm32-hash";
+			reg = <0x420c0400 0x400>;
+			clocks = <&rcc STM32_CLOCK(AHB2, 17)>;
+			resets = <&rctl STM32_RESET(AHB2L, 17)>;
+			status = "disabled";
+		};
 	};
 };