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boards: arm64: provide support for ROC-RK3568-PC
This is support for AArch64 development board. The board uses 4-core Cortex-A55, which are based on the ARMv8.2 architecture. In addition,we support smp support and it can use 4-cores to run basic samples. Signed-off-by: Charlie Xiong <[email protected]>
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‎boards/arm64/roc_rk3568_pc/CMakeLists.txt‎

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# SPDX-License-Identifier: Apache-2.0

‎boards/arm64/roc_rk3568_pc/Kconfig.board‎

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# Copyright 2022 HNU-ESNL
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# Copyright 2022 openEuler SIG-Zephyr
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_ROC_RK3568_PC
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bool "Rockchip ROC-RK3568-PC"
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depends on SOC_SERIES_RK3568
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select ARM64

‎boards/arm64/roc_rk3568_pc/Kconfig.defconfig‎

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# Copyright 2022 HNU-ESNL
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# Copyright 2022 openEuler SIG-Zephyr
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_ROC_RK3568_PC
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config BOARD
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default "roc_rk3568_pc"
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endif # BOARD_ROC_RK3568_PC

‎boards/arm64/roc_rk3568_pc/board.cmake‎

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# SPDX-License-Identifier: Apache-2.0

‎boards/arm64/roc_rk3568_pc/doc/index.rst‎

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.. _roc_rk3568_pc:
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Firefly ROC-RK3568-PC (Quad-core Cortex-A55)
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############################################
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Overview
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********
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The ROC-RK3568-PC is a Quad-Core 64-Bit Mini Computer, which supports 4G large RAM. M.2
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and SATA3.0 interfaces enables expansion with large hard drives.
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Providing dual Gigabit Ethernet ports, it supports WiFi 6 wireless transmission.
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Control Port can be connected with RS485/RS232 devices.
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RK3568 quad-core 64-bit Cortex-A55 processor, with brand new ARM v8.2-A architecture,
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has frequency up to 2.0GHz. Zephyr OS is ported to run on it.
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- Board features:
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- RAM: 4GB LPDDR4
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- Storage:
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- 32GB eMMC
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- M.2 PCIe 3.0 x 1 (Expand with 2242 / 2280 NVMe SSD)
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- TF-Card Slot
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- Wireless:
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- Supports WiFi 6 (802.11 AX)
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- Supports BT5.0
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- USB:
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- One USB 3.0
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- Two USB 2.0
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- One Type-C
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- Ethernet
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- M.2 PCIe3.0 (Expand with NVMe SSD)
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- LEDs:
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- 1x Power status LED
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- Debug
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- UART debug ports for board
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Supported Features
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==================
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The Zephyr roc_rk3568_pc board configuration supports the following hardware
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features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| GIC-v3 | on-chip | interrupt controller |
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+-----------+------------+-------------------------------------+
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| ARM TIMER | on-chip | system clock |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+-----------+------------+-------------------------------------+
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Devices
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========
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System Clock
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------------
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This board configuration uses a system clock frequency of 24 MHz.
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Cortex-A55 Core runs up to 2.0 GHz.
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Serial Port
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-----------
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This board configuration uses a single serial communication channel with the
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CPU's UART2.
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Programming and Debugging
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*************************
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Use U-Boot to load the zephyr.bin to the memory and kick it:
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.. code-block:: console
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tftp 0x40000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x40000000
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Use this configuration to run basic Zephyr applications and kernel tests,
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for example, with the :zephyr:code-sample:`synchronization` sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/synchronization
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:host-os: unix
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:board: roc_rk3568_pc
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:goals: run
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This will build an image with the synchronization sample app, boot it and
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display the following ram console output:
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.. code-block:: console
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*** Booting Zephyr OS build bc695c6df5eb ***
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thread_a: Hello World from cpu 0 on roc_rk3568_pc!
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thread_b: Hello World from cpu 0 on roc_rk3568_pc!
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thread_a: Hello World from cpu 0 on roc_rk3568_pc!
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thread_b: Hello World from cpu 0 on roc_rk3568_pc!
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roc_rk3568_pc_smp support, use this configuration to run Zephyr smp applications and subsys tests,
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for example, with the :zephyr:code-sample:`synchronization` sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/synchronization
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:host-os: unix
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:board: roc_rk3568_pc_smp
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:goals: run
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This will build an image with the shell_module sample app, boot it and
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display the following ram console output:
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.. code-block:: console
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*** Booting Zephyr OS build bc695c6df5eb ***
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I/TC: Secondary CPU 1 initializing
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I/TC: Secondary CPU 1 switching to normal world boot
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I/TC: Secondary CPU 2 initializing
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I/TC: Secondary CPU 2 switching to normal world boot
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I/TC: Secondary CPU 3 initializing
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I/TC: Secondary CPU 3 switching to normal world boot
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Secondary CPU core 1 (MPID:0x100) is up
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Secondary CPU core 2 (MPID:0x200) is up
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Secondary CPU core 3 (MPID:0x300) is up
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thread_a: Hello World from cpu 0 on roc_rk3568_pc!
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thread_b: Hello World from cpu 1 on roc_rk3568_pc!
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thread_a: Hello World from cpu 0 on roc_rk3568_pc!
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thread_b: Hello World from cpu 1 on roc_rk3568_pc!
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References
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==========
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More information can refer to Firefly official website:
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`Firefly website`_.
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.. _Firefly website:
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https://en.t-firefly.com/product/industry/rocrk3568pc.html?theme=pc

‎boards/arm64/roc_rk3568_pc/roc_rk3568_pc.dts‎

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/*
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* Copyright 2022 HNU-ESNL
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* Copyright 2022 openEuler SIG-Zephyr
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <arm64/rockchip/rk3568.dtsi>
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#include <common/mem.h>
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/ {
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model = "Firefly ROC-RK3568-PC";
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compatible = "rockchip,rk3568";
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chosen {
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zephyr,console = &uart2;
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zephyr,shell-uart = &uart2;
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zephyr,sram = &sram0;
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};
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sram0: memory@40000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x40000000 DT_SIZE_M(1)>;
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};
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};
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&uart2 {
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status = "okay";
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current-speed = <1500000>;
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};

‎boards/arm64/roc_rk3568_pc/roc_rk3568_pc.yaml‎

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identifier: roc_rk3568_pc
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name: Rockchip ROC RK3568 PC
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 1024
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testing:
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default: true
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ignore_tags:
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- net
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- bluetooth

‎boards/arm64/roc_rk3568_pc/roc_rk3568_pc_defconfig‎

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# Copyright 2021 HNU-ESNL
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# Copyright 2022 openEuler SIG-Zephyr
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# SPDX-License-Identifier: Apache-2.0
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# Platform Configuration
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CONFIG_SOC_SERIES_RK3568=y
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CONFIG_SOC_RK3568=y
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CONFIG_BOARD_ROC_RK3568_PC=y
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CONFIG_ARM_ARCH_TIMER=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_NS16550=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# ARMv8 NS world with cache management
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CONFIG_ARMV8_A_NS=y
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CONFIG_CACHE_MANAGEMENT=y
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# Clock support
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CONFIG_CLOCK_CONTROL=y
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CONFIG_TICKLESS_KERNEL=y

‎boards/arm64/roc_rk3568_pc/roc_rk3568_pc_smp.dts‎

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/*
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* Copyright 2022 HNU-ESNL
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* Copyright 2022 openEuler SIG-Zephyr
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "roc_rk3568_pc.dts"

‎boards/arm64/roc_rk3568_pc/roc_rk3568_pc_smp.yaml‎

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identifier: roc_rk3568_pc_smp
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name: Rockchip ROC RK3568 PC SMP
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 1024
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supported:
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- smp
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testing:
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default: true
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ignore_tags:
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- net
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- bluetooth

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