boards: Update related configuration for RT700 xspi case

SuperHeroAbner · dkalowsk · commit 9560a965238e · 2025-10-24T08:56:59.000-07:00
Add flash and psram dts based on RT700 board resource.
Add the clock and power setting for XSPI in board specfic initilization
function.

Signed-off-by: Ruijia Wang &lt;ruijia.wang@nxp.com&gt;
diff --git a/boards/nxp/mimxrt700_evk/board.c b/boards/nxp/mimxrt700_evk/board.c
@@ -568,6 +568,34 @@ void board_early_init_hook(void)
 	CLOCK_SetClkDiv(kCLOCK_DivMediaMainClk, 2U);
 	CLOCK_AttachClk(kMAIN_PLL_PFD2_to_MEDIA_MAIN);
 #endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(xspi0))
+	POWER_DisablePD(kPDRUNCFG_APD_XSPI0);
+	POWER_DisablePD(kPDRUNCFG_PPD_XSPI0);
+	POWER_ApplyPD();
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(xspi1))
+	xspi_setup_clock(XSPI1, 1U, 1U); /* Audio PLL PDF1 DIV1. */
+
+	POWER_DisablePD(kPDRUNCFG_APD_XSPI1);
+	POWER_DisablePD(kPDRUNCFG_PPD_XSPI1);
+	POWER_ApplyPD();
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(xspi2))
+#if CONFIG_SOC_MIMXRT798S_CM33_CPU0
+	CLOCK_AttachClk(kMAIN_PLL_PFD3_to_XSPI2);
+#elif CONFIG_SOC_MIMXRT798S_CM33_CPU1
+	CLOCK_AttachClk(kFRO1_DIV1_to_COMMON_BASE);
+	CLOCK_AttachClk(kCOMMON_BASE_to_XSPI2);
+#endif
+	CLOCK_SetClkDiv(kCLOCK_DivXspi2Clk, 1U);
+
+	POWER_DisablePD(kPDRUNCFG_APD_XSPI2);
+	POWER_DisablePD(kPDRUNCFG_PPD_XSPI2);
+	POWER_ApplyPD();
+#endif
 }
 
 static void GlikeyWriteEnable(GLIKEY_Type *base, uint8_t idx)
diff --git a/boards/nxp/mimxrt700_evk/mimxrt700_evk-pinctrl.dtsi b/boards/nxp/mimxrt700_evk/mimxrt700_evk-pinctrl.dtsi
@@ -193,4 +193,83 @@
 			slew-rate = "normal";
 		};
 	};
+
+	pinmux_xspi0: pinmux_xspi0 {
+		group0 {
+			pinmux = <XSPI0_SCK_A_N_PIO6_0>,
+				 <XSPI0_SCK_A_PIO6_1>,
+				 <XSPI0_PCS_A_0_PIO6_2>,
+				 <XSPI0_DATA0_PIO6_3>,
+				 <XSPI0_DATA1_PIO6_4>,
+				 <XSPI0_DATA2_PIO6_5>,
+				 <XSPI0_DATA3_PIO6_6>,
+				 <XSPI0_DQS_A_0_PIO6_7>,
+				 <XSPI0_DATA4_PIO6_8>,
+				 <XSPI0_DATA5_PIO6_9>,
+				 <XSPI0_DATA6_PIO6_10>,
+				 <XSPI0_DATA7_PIO6_11>,
+				 <XSPI0_PCS_A_1_PIO6_12>;
+			drive-strength = "normal";
+			slew-rate = "normal";
+			input-enable;
+		};
+	};
+
+	pinmux_xspi1: pinmux_xspi1 {
+		group0 {
+			pinmux = <XSPI1_PCS_A_0_PIO5_0>,
+				 <XSPI1_DATA0_PIO5_1>,
+				 <XSPI1_DATA1_PIO5_2>,
+				 <XSPI1_DATA2_PIO5_3>,
+				 <XSPI1_DATA3_PIO5_4>,
+				 <XSPI1_DATA4_PIO5_6>,
+				 <XSPI1_DATA5_PIO5_7>,
+				 <XSPI1_DATA6_PIO5_8>,
+				 <XSPI1_DATA7_PIO5_9>,
+				 <XSPI1_DQS_A_0_PIO5_5>,
+				 <XSPI1_SCK_A_PIO5_10>,
+				 <XSPI1_SCK_A_N_PIO5_11>,
+				 <XSPI1_DATA8_PIO5_12>,
+				 <XSPI1_DATA9_PIO5_13>,
+				 <XSPI1_DATA10_PIO5_14>,
+				 <XSPI1_DATA11_PIO5_15>,
+				 <XSPI1_DQS_A_1_PIO5_16>,
+				 <XSPI1_DATA12_PIO5_17>,
+				 <XSPI1_DATA13_PIO5_18>,
+				 <XSPI1_DATA14_PIO5_19>,
+				 <XSPI1_DATA15_PIO5_20>;
+			drive-strength = "normal";
+			slew-rate = "normal";
+			input-enable;
+		};
+	};
+
+	pinmux_xspi2: pinmux_xspi2 {
+		group0 {
+			pinmux = <XSPI2_PCS_A_0_PIO4_0>,
+				 <XSPI2_DATA0_PIO4_1>,
+				 <XSPI2_DATA1_PIO4_2>,
+				 <XSPI2_DATA2_PIO4_3>,
+				 <XSPI2_DATA3_PIO4_4>,
+				 <XSPI2_DQS_A_0_PIO4_5>,
+				 <XSPI2_DATA4_PIO4_6>,
+				 <XSPI2_DATA5_PIO4_7>,
+				 <XSPI2_DATA6_PIO4_8>,
+				 <XSPI2_DATA7_PIO4_9>,
+				 <XSPI2_SCK_A_PIO4_10>,
+				 <XSPI2_SCK_A_N_PIO4_11>,
+				 <XSPI2_DATA8_PIO4_12>,
+				 <XSPI2_DATA9_PIO4_13>,
+				 <XSPI2_DATA10_PIO4_14>,
+				 <XSPI2_DATA11_PIO4_15>,
+				 <XSPI2_DQS_A_1_PIO4_16>,
+				 <XSPI2_DATA12_PIO4_17>,
+				 <XSPI2_DATA13_PIO4_18>,
+				 <XSPI2_DATA14_PIO4_19>,
+				 <XSPI2_DATA15_PIO4_20>;
+			drive-strength = "normal";
+			slew-rate = "normal";
+			input-enable;
+		};
+	};
 };
diff --git a/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu0.dts b/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu0.dts
@@ -26,11 +26,12 @@
 		i2s-tx = &sai0;
 		sdhc0 = &usdhc0;
 		rtc = &rtc0;
+		sram-ext = &psram0;
 	};
 
 	chosen {
-		zephyr,flash-controller = &mx25um51345g;
-		zephyr,flash = &mx25um51345g;
+		zephyr,flash-controller = &flash_controller0;
+		zephyr,flash = &ext_flash;
 		zephyr,sram = &sram0;
 		zephyr,console = &flexcomm0_lpuart0;
 		zephyr,shell-uart = &flexcomm0_lpuart0;
@@ -95,6 +96,19 @@
 		enable-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
 		regulator-boot-on;
 	};
+
+	memc: memc@8000000 {
+		status = "okay";
+		reg = <0x08000000 DT_SIZE_M(32)>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		psram: memory@8000000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x08000000 DT_SIZE_M(32)>;
+			zephyr,memory-region = "PSRAM";
+		};
+	};
 };
 
 &ctimer0 {
@@ -325,47 +339,103 @@ zephyr_lcdif: &lcdif {};
 
 &xspi0 {
 	status = "okay";
+	pinctrl-0 = <&pinmux_xspi0>;
+	pinctrl-names = "default";
+	byte-order = <3>;
+	ahb-buffer-write-flush;
+	ahb-prefetch;
 
-	mx25um51345g: mx25um51345g@0 {
-		compatible = "nxp,xspi-mx25um51345g";
-		/* MX25UM51245G is 64MB, 512MBit flash part */
-		size = <DT_SIZE_M(64 * 8)>;
-		reg = <0>;
-		spi-max-frequency = <DT_FREQ_M(200)>;
+	flash_controller0: flash-controller@0 {
 		status = "okay";
-		jedec-id = [c2 81 3a];
-		erase-block-size = <DT_SIZE_K(4)>;
-		write-block-size = <2>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			/*
-			 * Partition sizes must be aligned
-			 * to the flash memory sector size of 4KB.
-			 */
-			boot_partition: partition@0 {
-				label = "mcuboot";
-				reg = <0x00000000 DT_SIZE_K(128)>;
-			};
-			slot0_partition: partition@20000 {
-				label = "image-0";
-				reg = <0x00020000 DT_SIZE_M(7)>;
-			};
-			slot1_partition: partition@720000 {
-				label = "image-1";
-				reg = <0x00720000 DT_SIZE_M(7)>;
-			};
-			storage_partition: partition@E20000 {
-				label = "storage";
-				reg = <0x00E20000 (DT_SIZE_M(2) - DT_SIZE_K(128))>;
+		compatible = "nxp,xspi-nor";
+		device-name = "mx25um51345g";
+		/* MX25UM51245G is 64MB, 512Mbit flash part. */
+		size = <DT_SIZE_M(64)>;
+		reg = <0>;
+		sample-clk-source = <3>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ext_flash: flash@38000000 {
+			compatible = "soc-nv-flash";
+			reg = <0x38000000 DT_SIZE_M(64)>;
+			erase-block-size = <DT_SIZE_K(4)>;
+			write-block-size = <2>;
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				/*
+				 * Partition sizes must be aligned
+				 * to the flash memory sector size of 4KB.
+				 */
+				boot_partition: partition@0 {
+					label = "mcuboot";
+					reg = <0x00000000 DT_SIZE_K(128)>;
+				};
+
+				slot0_partition: partition@20000 {
+					label = "image-0";
+					reg = <0x00020000 DT_SIZE_M(7)>;
+				};
+
+				slot1_partition: partition@720000 {
+					label = "image-1";
+					reg = <0x00720000 DT_SIZE_M(7)>;
+				};
+
+				storage_partition: partition@E20000 {
+					label = "storage";
+					reg = <0x00E20000 (DT_SIZE_M(2) - DT_SIZE_K(128))>;
+				};
 			};
 		};
 	};
 };
 
+&xspi1 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_xspi1>;
+	pinctrl-names = "default";
+	byte-order = <3>;
+	ahb-buffer-write-flush;
+	ahb-prefetch;
+	enable-ahb-write;
+	/* Connect JP45 1-2 to use XSPI1. */
+
+	psram0: memory-controller@0 {
+		status = "okay";
+		compatible = "nxp,xspi-psram";
+		device-name = "w958d6nbkx5l";
+		size = <DT_SIZE_M(32)>;
+		reg = <0>;
+		enable-differential-clk;
+		sample-clk-source = <3>;
+	};
+};
+
+&xspi2 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_xspi2>;
+	pinctrl-names = "default";
+	byte-order = <3>;
+	ahb-buffer-write-flush;
+	ahb-prefetch;
+	enable-ahb-write;
+
+	psram1: memory-controller@0 {
+		status = "okay";
+		compatible = "nxp,xspi-psram";
+		device-name = "w958d6nbkx4l";
+		size = <DT_SIZE_M(32)>;
+		reg = <0>;
+		enable-differential-clk;
+		sample-clk-source = <3>;
+	};
+};
+
 zephyr_udc0: &usb0 {
 	status = "okay";
 	phy-handle = <&usbphy>;
diff --git a/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu0.yaml b/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu0.yaml
@@ -24,4 +24,6 @@ supported:
   - usb_device
   - watchdog
   - hwinfo
+  - flash
+  - memc
 vendor: nxp
diff --git a/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu1.dts b/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu1.dts
@@ -20,6 +20,7 @@
 		sw0 = &user_button_1;
 		ambient-temp0 = &p3t1755;
 		rtc = &rtc1;
+		sram-ext = &psram;
 	};
 
 	chosen {
@@ -114,3 +115,23 @@
 &mbox1_b {
 	status = "okay";
 };
+
+&xspi2 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_xspi2>;
+	pinctrl-names = "default";
+	byte-order = <3>;
+	ahb-buffer-write-flush;
+	ahb-prefetch;
+	enable-ahb-write;
+
+	psram: memory-controller@0 {
+		status = "okay";
+		compatible = "nxp,xspi-psram";
+		device-name = "w958d6nbkx4l";
+		size = <DT_SIZE_M(32)>;
+		reg = <0>;
+		enable-differential-clk;
+		sample-clk-source = <3>;
+	};
+};
diff --git a/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu1.yaml b/boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu1.yaml
@@ -19,4 +19,6 @@ supported:
   - uart
   - adc
   - i3c
+  - flash
+  - memc
 vendor: nxp

-Original file line number
+Diff line change
   - uart
   - adc
   - i3c
 +  - flash
 +  - memc
 vendor: nxp