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drivers: dac: implement the silabs_vdac compatible driver
This implements the DAC driver for silabs VDAC peripherals using the silabs,vdac compatible binding. Signed-off-by: Bastien Beauchamp <[email protected]>
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‎drivers/dac/CMakeLists.txt

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@@ -30,3 +30,4 @@ zephyr_library_sources_ifdef(CONFIG_DAC_MCUX_GAU dac_mcux_gau.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_TEST dac_test.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_MAX22017 dac_max22017.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_RENESAS_RA dac_renesas_ra.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_SILABS_VDAC dac_silabs_vdac.c)

‎drivers/dac/Kconfig

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@@ -69,4 +69,6 @@ source "drivers/dac/Kconfig.renesas_ra"
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source "drivers/dac/Kconfig.samd5x"
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source "drivers/dac/Kconfig.silabs"
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endif # DAC

‎drivers/dac/Kconfig.silabs

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# Copyright (c) 2025 Silicon Laboratories Inc.
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# SPDX-License-Identifier: Apache-2.0
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config DAC_SILABS_VDAC
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bool "Silabs DAC driver for VDAC"
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default y
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depends on DT_HAS_SILABS_VDAC_ENABLED
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select PINCTRL
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select SILABS_SISDK_VDAC
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help
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Enable the Digital-to-Analog Converter driver for the
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VDAC hardware block present on Silicon Labs devices.

‎drivers/dac/dac_silabs_vdac.c

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/drivers/dac.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/clock_control_silabs.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/irq.h>
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#include <sl_hal_vdac.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(silabs_vdac, CONFIG_DAC_LOG_LEVEL);
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#define DT_DRV_COMPAT silabs_vdac
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#define NUM_CHANNELS 2
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#define MAX_FREQUENCY 1000000
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/* Read-only driver configuration */
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struct vdac_config {
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VDAC_TypeDef *base;
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const struct pinctrl_dev_config *pincfg;
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const struct device *clock_dev;
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const struct silabs_clock_control_cmu_config clock_cfg;
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sl_hal_vdac_init_t init;
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sl_hal_vdac_init_channel_t channel_init[NUM_CHANNELS];
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};
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static int vdac_init(const struct device *dev)
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{
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const struct vdac_config *config = dev->config;
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sl_hal_vdac_init_t init = config->init;
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uint32_t freq;
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int err;
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/* Configure pinctrl */
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err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
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if (err < 0 && err != -ENOENT) {
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LOG_ERR("failed to allocate silabs,analog-bus via pinctrl");
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return err;
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}
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/* Enable VDAC Clock */
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err = clock_control_on(config->clock_dev,
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(clock_control_subsys_t)&config->clock_cfg);
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if (err < 0) {
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LOG_ERR("failed to enable clocks via clock_control");
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return err;
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}
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/* Calculate clock prescaler */
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err = clock_control_get_rate(config->clock_dev,
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(clock_control_subsys_t)&config->clock_cfg, &freq);
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if (err < 0) {
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LOG_ERR("failed to get clock rate via clock_control");
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return err;
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}
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init.prescaler = sl_hal_vdac_calculate_prescaler(config->base, MAX_FREQUENCY, freq);
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/* Initialize VDAC */
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sl_hal_vdac_init(config->base, &init);
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return 0;
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}
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static int vdac_channel_setup(const struct device *dev, const struct dac_channel_cfg *channel_cfg)
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{
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const struct vdac_config *config = dev->config;
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if (channel_cfg->channel_id >= NUM_CHANNELS) {
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LOG_ERR("unsupported channel %d", channel_cfg->channel_id);
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return -ENOTSUP;
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}
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if (channel_cfg->resolution != VDAC_RESOLUTION(VDAC_NUM(config->base))) {
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LOG_ERR("unsupported resolution %d", channel_cfg->resolution);
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return -ENOTSUP;
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}
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if (channel_cfg->internal) {
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LOG_ERR("internal channels not supported");
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return -ENOTSUP;
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}
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/* Configure channel */
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sl_hal_vdac_init_channel(config->base,
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&config->channel_init[channel_cfg->channel_id],
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channel_cfg->channel_id);
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/* Start channel */
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sl_hal_vdac_enable_channel(config->base, channel_cfg->channel_id);
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return 0;
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}
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static int vdac_write_value(const struct device *dev, uint8_t channel, uint32_t value)
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{
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const struct vdac_config *config = dev->config;
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if (channel >= NUM_CHANNELS) {
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LOG_ERR("unsupported channel %d", channel);
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return -ENOTSUP;
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}
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if (value >= (1 << VDAC_RESOLUTION(VDAC_NUM(config->base)))) {
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LOG_ERR("value %d out of range", value);
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return -ENOTSUP;
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}
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/* Write value to VDAC channel */
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sl_hal_vdac_set_output_channel(config->base, channel, value);
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return 0;
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}
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static DEVICE_API(dac, vdac_api) = {
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.channel_setup = vdac_channel_setup,
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.write_value = vdac_write_value,
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};
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#define VDAC_CHANNEL(node) \
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.channel_init[DT_REG_ADDR(node)] = { \
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.main_out_enable = DT_PROP(node, main_output), \
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.aux_out_enable = DT_NODE_HAS_PROP(node, aux_output), \
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.short_output = DT_PROP(node, short_output), \
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.power_mode = DT_PROP(node, low_power_mode), \
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.high_cap_load_enable = DT_PROP(node, high_capacitance_load), \
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.port = DT_PROP_OR(node, aux_output, 0) >> 4, \
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.pin = DT_PROP_OR(node, aux_output, 0) & 0xF, \
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.sample_off_mode = DT_PROP(node, sample_off_mode), \
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.hold_out_time = DT_PROP(node, output_hold_cycles), \
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.ch_refresh_source = DT_PROP(node, refresh_timer), \
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.trigger_mode = SL_HAL_VDAC_TRIGGER_MODE_SW, \
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},
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#define VDAC_DEVICE(inst) \
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\
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PINCTRL_DT_INST_DEFINE(inst); \
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\
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static const struct vdac_config vdac_config_##inst = { \
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.base = (VDAC_TypeDef *)DT_INST_REG_ADDR(inst), \
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.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
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.clock_cfg = SILABS_DT_INST_CLOCK_CFG(inst), \
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.init = SL_HAL_VDAC_INIT_DEFAULT, \
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.init.reference = DT_INST_ENUM_IDX(inst, voltage_reference), \
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.init.warmup_time = DT_INST_PROP(inst, warmup_cycles), \
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.init.refresh = DT_INST_ENUM_IDX(inst, refresh_period_cycles), \
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DT_INST_FOREACH_CHILD(inst, VDAC_CHANNEL) \
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}; \
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\
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DEVICE_DT_INST_DEFINE(inst, &vdac_init, PM_DEVICE_DT_INST_GET(inst), \
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NULL, &vdac_config_##inst, POST_KERNEL, \
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CONFIG_DAC_INIT_PRIORITY, &vdac_api);
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DT_INST_FOREACH_STATUS_OKAY(VDAC_DEVICE)

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