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| 1 | +/* |
| 2 | + * Copyright (c) 2020 Intel Corporation. |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#include <arch/arm/aarch32/arch.h> |
| 8 | +#include <kernel.h> |
| 9 | +#include <sys_clock.h> |
| 10 | +#include <timing/timing.h> |
| 11 | +#include <nrfx.h> |
| 12 | + |
| 13 | +#if defined(CONFIG_NRF_RTC_TIMER) |
| 14 | + |
| 15 | + |
| 16 | +#define CYCLES_PER_SEC (16000000 / (1 << NRF_TIMER2->PRESCALER)) |
| 17 | + |
| 18 | +void timing_init(void) |
| 19 | +{ |
| 20 | + NRF_TIMER2->TASKS_CLEAR = 1; /* Clear Timer */ |
| 21 | + NRF_TIMER2->MODE = 0; /* Timer Mode */ |
| 22 | + NRF_TIMER2->PRESCALER = 0; /* 16M Hz */ |
| 23 | + NRF_TIMER2->BITMODE = 3; /* 32 - bit */ |
| 24 | +} |
| 25 | + |
| 26 | +void timing_start(void) |
| 27 | +{ |
| 28 | + NRF_TIMER2->TASKS_START = 1; |
| 29 | +} |
| 30 | + |
| 31 | +void timing_stop(void) |
| 32 | +{ |
| 33 | + NRF_TIMER2->TASKS_STOP = 1; /* Stop Timer */ |
| 34 | +} |
| 35 | + |
| 36 | +timing_t timing_counter_get(void) |
| 37 | +{ |
| 38 | + NRF_TIMER2->TASKS_CAPTURE[0] = 1; |
| 39 | + return NRF_TIMER2->CC[0] * ((SystemCoreClock) / CYCLES_PER_SEC); |
| 40 | +} |
| 41 | + |
| 42 | +uint64_t timing_cycles_get(volatile timing_t *const start, |
| 43 | + volatile timing_t *const end) |
| 44 | +{ |
| 45 | + return (*end - *start); |
| 46 | +} |
| 47 | + |
| 48 | +uint64_t timing_freq_get(void) |
| 49 | +{ |
| 50 | + return SystemCoreClock; |
| 51 | +} |
| 52 | + |
| 53 | +uint64_t timing_cycles_to_ns(uint64_t cycles) |
| 54 | +{ |
| 55 | + return (cycles) * (NSEC_PER_SEC) / (SystemCoreClock); |
| 56 | +} |
| 57 | + |
| 58 | +uint64_t timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count) |
| 59 | +{ |
| 60 | + return timing_cycles_to_ns(cycles) / count; |
| 61 | +} |
| 62 | + |
| 63 | +uint32_t timing_freq_get_mhz(void) |
| 64 | +{ |
| 65 | + return (uint32_t)(timing_freq_get() / 1000000); |
| 66 | +} |
| 67 | + |
| 68 | +#endif |
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