linker: stm32wb: move IPC RAM definition to DT

Move the definition of the two IPC RAM blocks from `#define`'s in family
linker scripts to proper devicetree nodes. Use the devicetree nodes to
generate the memory regions.

Signed-off-by: Jordan Yates <[email protected]>

Author: Jordan Yates

dts/arm/st/wb/stm32wb.dtsi

@@ -31,6 +31,16 @@
 		compatible = "mmio-sram";
 	};
 
+	sram1: memory@20030000 {
+		compatible = "mmio-sram";
+		reg = <0x20030000 0x2800>;
+	};
+
+	sram2: memory@20038000 {
+		compatible = "mmio-sram";
+		reg = <0x20038000 0x5000>;
+	};
+
 	soc {
 		flash: flash-controller@58004000 {
 			compatible = "st,stm32-flash-controller", "st,stm32wb-flash-controller";

include/arch/arm/aarch32/cortex_m/scripts/linker.ld

@@ -102,10 +102,9 @@ MEMORY
     DT_REGION_FROM_NODE_STATUS_OKAY(DTCM, rw, DT_CHOSEN(zephyr_dtcm))
     /* STM32 Core Coupled Memory */
     DT_REGION_FROM_NODE_STATUS_OKAY(CCM, rw, DT_CHOSEN(zephyr_ccm))
-#ifdef CONFIG_BT_STM32_IPM
-    SRAM1                 (rw) : ORIGIN = RAM1_ADDR, LENGTH = RAM1_SIZE
-    SRAM2                 (rw) : ORIGIN = RAM2_ADDR, LENGTH = RAM2_SIZE
-#endif
+    /* STM32WB IPC RAM */
+    DT_REGION_FROM_NODE_STATUS_OKAY(SRAM1, rw, DT_NODELABEL(sram1))
+    DT_REGION_FROM_NODE_STATUS_OKAY(SRAM2, rw, DT_NODELABEL(sram2))
     /* STM32 alternate RAM configurations */
     DT_REGION_FROM_NODE_STATUS_OKAY(SDRAM1, rw, DT_NODELABEL(sdram1))
     DT_REGION_FROM_NODE_STATUS_OKAY(SDRAM2, rw, DT_NODELABEL(sdram2))

soc/arm/st_stm32/stm32wb/linker.ld

@@ -6,9 +6,4 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#define RAM1_SIZE (10 * 1K)
-#define RAM1_ADDR 0x20030000
-#define RAM2_SIZE (20 * 1K)
-#define RAM2_ADDR 0x20038000
-
 #include <arch/arm/aarch32/cortex_m/scripts/linker.ld>