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| 1 | +/* |
| 2 | + * Copyright (c) 2022 Intel Corporation |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#ifndef ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_STACK_H_ |
| 8 | +#define ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_STACK_H_ |
| 9 | + |
| 10 | +#include <xtensa/config/core-isa.h> |
| 11 | +#include <zephyr/toolchain.h> |
| 12 | + |
| 13 | +#ifdef CONFIG_KERNEL_COHERENCE |
| 14 | +#define ARCH_STACK_PTR_ALIGN XCHAL_DCACHE_LINESIZE |
| 15 | +#else |
| 16 | +#define ARCH_STACK_PTR_ALIGN 16 |
| 17 | +#endif |
| 18 | + |
| 19 | + |
| 20 | +#if CONFIG_USERSPACE |
| 21 | +#define Z_XTENSA_STACK_BASE_ALIGN CONFIG_MMU_PAGE_SIZE |
| 22 | +#define Z_XTENSA_STACK_SIZE_ALIGN CONFIG_MMU_PAGE_SIZE |
| 23 | +#else |
| 24 | +#define Z_XTENSA_STACK_BASE_ALIGN ARCH_STACK_PTR_ALIGN |
| 25 | +#define Z_XTENSA_STACK_SIZE_ALIGN ARCH_STACK_PTR_ALIGN |
| 26 | +#endif |
| 27 | + |
| 28 | +/* |
| 29 | + * |
| 30 | + * High memory addresses |
| 31 | + * |
| 32 | + * +-------------------+ <- thread.stack_info.start + thread.stack_info.size |
| 33 | + * | TLS | |
| 34 | + * +-------------------+ <- initial sp (computable with thread.stack_info.delta) |
| 35 | + * | | |
| 36 | + * | Thread stack | |
| 37 | + * | | |
| 38 | + * +-------------------+ <- thread.stack_info.start |
| 39 | + * | Privileged stack | } CONFIG_MMU_PAGE_SIZE |
| 40 | + * +-------------------+ <- thread.stack_obj |
| 41 | + * |
| 42 | + * Low Memory addresses |
| 43 | + */ |
| 44 | + |
| 45 | +#ifndef _ASMLANGUAGE |
| 46 | + |
| 47 | +/* thread stack */ |
| 48 | +#ifdef CONFIG_XTENSA_MMU |
| 49 | +struct z_xtensa_thread_stack_header { |
| 50 | + char privilege_stack[CONFIG_MMU_PAGE_SIZE]; |
| 51 | +} __packed __aligned(Z_XTENSA_STACK_BASE_ALIGN); |
| 52 | + |
| 53 | +#define ARCH_THREAD_STACK_RESERVED \ |
| 54 | + sizeof(struct z_xtensa_thread_stack_header) |
| 55 | +#endif /* CONFIG_XTENSA_MMU */ |
| 56 | + |
| 57 | +#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_XTENSA_STACK_BASE_ALIGN |
| 58 | +#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \ |
| 59 | + ROUND_UP((size), Z_XTENSA_STACK_SIZE_ALIGN) |
| 60 | + |
| 61 | +/* kernel stack */ |
| 62 | +#define ARCH_KERNEL_STACK_RESERVED 0 |
| 63 | +#define ARCH_KERNEL_STACK_OBJ_ALIGN ARCH_STACK_PTR_ALIGN |
| 64 | + |
| 65 | +#endif /* _ASMLANGUAGE */ |
| 66 | + |
| 67 | +#endif |
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