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lines changed Original file line number Diff line number Diff line change 121
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compatible = "st,stm32l4-pll-clock";
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status = "disabled";
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};
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+
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+ pllsai1: pllsai1 {
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+ #clock-cells = <0>;
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+ compatible = "st,stm32l4-pllsai-clock";
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+ status = "disabled";
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+ };
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};
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soc {
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clocks = <&rcc STM32_CLOCK(AHB3, 0)>;
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status = "disabled";
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};
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+
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+ sai1_a: sai1@40015404 {
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+ compatible = "st,stm32-sai";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x40015404 0x20>;
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+ clocks = <&rcc STM32_CLOCK(APB2, 21)>,
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+ <&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
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+ dmas = <&dma1 1 37 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
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+ STM32_DMA_16BITS)>;
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+ status = "disabled";
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+ };
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+
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+ sai1_b: sai1@40015424 {
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+ compatible = "st,stm32-sai";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x40015424 0x20>;
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+ clocks = <&rcc STM32_CLOCK(APB2, 21)>,
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+ <&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
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+ dmas = <&dma1 2 38 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
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+ STM32_DMA_16BITS)>;
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+ status = "disabled";
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+ };
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};
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die_temp: dietemp {
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