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| 1 | +# Copyright (c) 2024 Piotr Rak |
| 2 | +# SPDX-License-Identifier: Apache-2.0 |
| 3 | + |
| 4 | +description: | |
| 5 | + This binding describes the Rensas RA-series RV40F Phase-2 flash area layout. |
| 6 | +
|
| 7 | + Renesas RA-series MCUs use two kinds of flash memory: |
| 8 | +
|
| 9 | + |---------------|-------------------------------|-------------------------| |
| 10 | + | Varian | Board | | |
| 11 | + |---------------|-------------------------------|-------------------------| |
| 12 | + | RV40F Phase 2 | eg. RA6M1, RA6M2, RA6M3 RA6T1 | <= Describing this here | |
| 13 | + |---------------|-------------------------------|-------------------------| |
| 14 | + | MF3 | eg. RA2A1 RA4M1 RA4W1 | _NOT_ applicable | |
| 15 | + |---------------|-------------------------------|-------------------------| |
| 16 | +
|
| 17 | + Documentation: |
| 18 | + - Application Note "Renesas RA Family - Flash Memory Programming Rev 1.20" |
| 19 | + (https://www.renesas.com/us/en/document/apn/flash-memory-programming) |
| 20 | + - Additionally: |
| 21 | + * RA6Mx RA6Tx Groups "User's Manual: Hardware" |
| 22 | + * RA8D1 RA8M1 RA8T1 Groups "User's Manual: Hardware" |
| 23 | +
|
| 24 | + The Renesas RA MCUs RV40F kind flash area varies in: |
| 25 | + - the write-block-size(s) (referred to as programming-size in above mentioned documentation), |
| 26 | + - the read size |
| 27 | + - the layout of erase-blocks |
| 28 | +
|
| 29 | + for different regions and kinds of flash. |
| 30 | +
|
| 31 | + E.g. the code flash layout of R7FA6M5BH3CFC: |
| 32 | +
|
| 33 | + |-------------------| |
| 34 | + | Block 0 (8 KiB) | erase = 8 KiB (1 block); write = 128 B |
| 35 | + |-------------------| |
| 36 | + | Block 1 (8 KiB) | erase = 8 KiB (1 block); write = 128 B |
| 37 | + |-------------------| |
| 38 | + | ... | erase = 8 KiB (1 block); write = 128 B |
| 39 | + |-------------------| |
| 40 | + | Block 7 (8 KiB) | erase = 8 KiB (1 block); write = 128 B |
| 41 | + |-------------------| |
| 42 | + | Block 8 (32 KiB) | erase = 32 KiB (1 block); write = 128 B |
| 43 | + |-------------------| |
| 44 | + | Block 9 (32 KiB) | erase = 32 KiB (1 block); write = 128 B |
| 45 | + |-------------------| |
| 46 | + | ... | erase = 32 KiB (1 block); write = 128 B |
| 47 | + |-------------------| |
| 48 | + | Block 68 (32 KiB) | erase = 32 KiB (1 block); write = 128 B |
| 49 | + |-------------------| |
| 50 | +
|
| 51 | +
|
| 52 | + E.g. the data flash layout of R7FA6M5BH3CFC: |
| 53 | +
|
| 54 | + |-------------------| |
| 55 | + | Block 0 (64 B) | erase1 = 64 B (1 block); erase2 = 64/128/256 B; write = 4/8/16 B |
| 56 | + |-------------------| |
| 57 | + | Block 1 (64 B) | erase1 = 64 B (1 block); erase2 = 64/128/256 B; write = 4/8/16 B |
| 58 | + |-------------------| |
| 59 | + | ... | erase1 = 64 B (1 block); erase2 = 64/128/256 B; write = 4/8/16 B |
| 60 | + |-------------------| |
| 61 | + | Block 127 (64 B) | erase1 = 64 B (1 block); erase2 = 64/128/256 B; write = 4/8/16 B |
| 62 | + |-------------------| |
| 63 | +
|
| 64 | +
|
| 65 | + This flash area layout would be described as: |
| 66 | +
|
| 67 | + TODO |
| 68 | +
|
| 69 | + Notes: |
| 70 | + The flash area layout node flash0 should have both this |
| 71 | + compatible, "renesas,ra-rv40f", and the "soc-nv-flash" |
| 72 | + compatible. The latter is used from mcuboot and other |
| 73 | + modules to identify the flash area. |
| 74 | +
|
| 75 | +compatible: "renesas,ra-rv40f-flash" |
| 76 | + |
| 77 | +include: base.yaml |
| 78 | + |
| 79 | +properties: |
| 80 | + write-block-size: |
| 81 | + type: int |
| 82 | + description: | |
| 83 | + TODO |
| 84 | +
|
| 85 | + erase-block-size: |
| 86 | + type: int |
| 87 | + description: | |
| 88 | + TODO |
| 89 | +
|
| 90 | + fixme-erase2-block-sizes: |
| 91 | + type: int |
| 92 | + description: | |
| 93 | + TODO |
| 94 | +
|
| 95 | + fixme-erase-blocks: |
| 96 | + type: phandle-array |
| 97 | + description: | |
| 98 | + TODO |
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