arm: fix irq_unlock() ordering bug

mshawcroft · galak · commit d97299c9fa04 · 2016-12-02T16:38:41.000Z
Add the missing memory clobber to irq_unlock() in order to prevent the
compiler reordering memory operations over the unlock.

Change-Id: If1d664079796618ed247ff5b33b8b3f85fb7e680
Signed-off-by: Marcus Shawcroft &lt;marcus.shawcroft@arm.com&gt;
diff --git a/include/arch/arm/cortex_m/asm_inline_gcc.h b/include/arch/arm/cortex_m/asm_inline_gcc.h
@@ -173,9 +173,9 @@ static ALWAYS_INLINE void _arch_irq_unlock(unsigned int key)
 	if (key) {
 		return;
 	}
-	__asm__ volatile("cpsie i;\n\t");
+	__asm__ volatile("cpsie i;\n\t" : : : "memory");
 #else /* CONFIG_CPU_CORTEX_M3_M4 */
-	__asm__ volatile("msr BASEPRI, %0;\n\t" :  : "r"(key));
+	__asm__ volatile("msr BASEPRI, %0;\n\t" :  : "r"(key) : "memory");
 #endif
 }
 

Original file line number	Diff line number	Diff line change
`@@ -173,9 +173,9 @@ static ALWAYS_INLINE void _arch_irq_unlock(unsigned int key)`
`173`	`173`	`if (key) {`
`174`	`174`	`return;`
`175`	`175`	`}`
`176`		`- __asm__ volatile("cpsie i;\n\t");`
	`176`	`+ __asm__ volatile("cpsie i;\n\t" : : : "memory");`
`177`	`177`	`#else /* CONFIG_CPU_CORTEX_M3_M4 */`
`178`		`- __asm__ volatile("msr BASEPRI, %0;\n\t" : : "r"(key));`
	`178`	`+ __asm__ volatile("msr BASEPRI, %0;\n\t" : : "r"(key) : "memory");`
`179`	`179`	`#endif`
`180`	`180`	`}`
`181`	`181`