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drivers: gpio: Add support for RZ/T2M
Add GPIO driver support for RZ/T2M Signed-off-by: Quang Le <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]> Signed-off-by: Binh Nguyen <[email protected]>
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3 files changed

+266
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‎drivers/gpio/gpio_renesas_rz.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,11 @@ static const uint8_t gpio_rz_int[GPIO_RZ_MAX_PORT_NUM] = {
8282
#define GPIO_RZ_PIN_CONFIGURE_INPUT_OUTPUT_RESET (~(0x3 << 2))
8383
#define GPIO_RZ_PIN_SPECIAL_FLAG_GET(flag) GPIO_RZ_PIN_CONFIGURE_GET_FILTER(flag)
8484

85-
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L)
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static const uint8_t gpio_rz_int[GPIO_RZ_MAX_PORT_NUM] = {0, 4, 9, 13, 17, 23, 28, 33, 38, 43,
86+
47, 52, 56, 58, 63, 66, 70, 72, 76};
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#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) || \
89+
defined(CONFIG_SOC_SERIES_RZT2M)
8690
#include <zephyr/dt-bindings/gpio/renesas-rztn-gpio.h>
8791
#define GPIO_RZ_IOPORT_REG_REGION_GET(p) (R_BSP_IoRegionGet(p) == BSP_IO_REGION_NOT_SAFE ? 1 : 0)
8892

‎dts/arm/renesas/rz/rzt/r9a07g075.dtsi

Lines changed: 228 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -249,6 +249,234 @@
249249
pinctrl: pinctrl@800a0000 {
250250
compatible = "renesas,rzt-pinctrl";
251251
reg = <0x800a0000 0x1000 0x81030c00 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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255+
gpio0: gpio@0 {
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compatible = "renesas,rz-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <8>;
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reg = <0x0>;
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status = "disabled";
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};
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264+
gpio1: gpio@100 {
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compatible = "renesas,rz-gpio";
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gpio-controller;
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#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0100>;
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status = "disabled";
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};
272+
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gpio2: gpio@200 {
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compatible = "renesas,rz-gpio";
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gpio-controller;
276+
#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0200>;
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status = "disabled";
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};
281+
282+
gpio3: gpio@300 {
283+
compatible = "renesas,rz-gpio";
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gpio-controller;
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#gpio-cells= <2>;
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ngpios = <8>;
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gpio-reserved-ranges= <1 1>;
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reg = <0x0300>;
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status = "disabled";
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};
291+
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gpio4: gpio@400 {
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compatible = "renesas,rz-gpio";
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gpio-controller;
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#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0400>;
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status = "disabled";
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};
300+
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gpio5: gpio@500 {
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compatible = "renesas,rz-gpio";
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gpio-controller;
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#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0500>;
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status = "disabled";
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};
309+
310+
gpio6: gpio@600 {
311+
compatible = "renesas,rz-gpio";
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gpio-controller;
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#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0600>;
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status = "disabled";
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};
318+
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gpio7: gpio@700 {
320+
compatible = "renesas,rz-gpio";
321+
gpio-controller;
322+
#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0700>;
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status = "disabled";
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};
327+
328+
gpio8: gpio@800 {
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compatible = "renesas,rz-gpio";
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gpio-controller;
331+
#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0800>;
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status = "disabled";
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};
336+
337+
gpio9: gpio@900 {
338+
compatible = "renesas,rz-gpio";
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gpio-controller;
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#gpio-cells= <2>;
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ngpios = <8>;
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reg = <0x0900>;
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status = "disabled";
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};
345+
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gpio10: gpio@a00 {
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compatible = "renesas,rz-gpio";
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gpio-controller;
349+
#gpio-cells= <2>;
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ngpios = <8>;
351+
reg = <0x0a00>;
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status = "disabled";
353+
};
354+
355+
gpio11: gpio@b00 {
356+
compatible = "renesas,rz-gpio";
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gpio-controller;
358+
#gpio-cells= <2>;
359+
ngpios = <8>;
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reg = <0x0b00>;
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status = "disabled";
362+
};
363+
364+
gpio12: gpio@c00 {
365+
compatible = "renesas,rz-gpio";
366+
gpio-controller;
367+
#gpio-cells= <2>;
368+
ngpios = <8>;
369+
reg = <0x0c00>;
370+
status = "disabled";
371+
};
372+
373+
gpio13: gpio@d00 {
374+
compatible = "renesas,rz-gpio";
375+
gpio-controller;
376+
#gpio-cells= <2>;
377+
ngpios = <8>;
378+
reg = <0x0d00>;
379+
status = "disabled";
380+
};
381+
382+
gpio14: gpio@e00 {
383+
compatible = "renesas,rz-gpio";
384+
gpio-controller;
385+
#gpio-cells= <2>;
386+
ngpios = <8>;
387+
reg = <0x0e00>;
388+
status = "disabled";
389+
};
390+
391+
gpio15: gpio@f00 {
392+
compatible = "renesas,rz-gpio";
393+
gpio-controller;
394+
#gpio-cells= <2>;
395+
ngpios = <8>;
396+
reg = <0x0f00>;
397+
status = "disabled";
398+
};
399+
400+
gpio16: gpio@1000 {
401+
compatible = "renesas,rz-gpio";
402+
gpio-controller;
403+
#gpio-cells= <2>;
404+
ngpios = <8>;
405+
reg = <0x1000>;
406+
status = "disabled";
407+
};
408+
409+
gpio17: gpio@1100 {
410+
compatible = "renesas,rz-gpio";
411+
gpio-controller;
412+
#gpio-cells= <2>;
413+
ngpios = <8>;
414+
reg = <0x1100>;
415+
status = "disabled";
416+
};
417+
418+
gpio18: gpio@1200 {
419+
compatible = "renesas,rz-gpio";
420+
gpio-controller;
421+
#gpio-cells= <2>;
422+
ngpios = <8>;
423+
reg = <0x1200>;
424+
status = "disabled";
425+
};
426+
427+
gpio19: gpio@1300 {
428+
compatible = "renesas,rz-gpio";
429+
gpio-controller;
430+
#gpio-cells= <2>;
431+
ngpios = <8>;
432+
reg = <0x1300>;
433+
status = "disabled";
434+
};
435+
436+
gpio20: gpio@1400 {
437+
compatible = "renesas,rz-gpio";
438+
gpio-controller;
439+
#gpio-cells= <2>;
440+
ngpios = <8>;
441+
reg = <0x1400>;
442+
status = "disabled";
443+
};
444+
445+
gpio21: gpio@1500 {
446+
compatible = "renesas,rz-gpio";
447+
gpio-controller;
448+
#gpio-cells= <2>;
449+
ngpios = <8>;
450+
reg = <0x1500>;
451+
status = "disabled";
452+
};
453+
454+
gpio22: gpio@1600 {
455+
compatible = "renesas,rz-gpio";
456+
gpio-controller;
457+
#gpio-cells= <2>;
458+
ngpios = <8>;
459+
reg = <0x1600>;
460+
status = "disabled";
461+
};
462+
463+
gpio23: gpio@1700 {
464+
compatible = "renesas,rz-gpio";
465+
gpio-controller;
466+
#gpio-cells= <2>;
467+
ngpios = <8>;
468+
reg = <0x1700>;
469+
status = "disabled";
470+
};
471+
472+
gpio24: gpio@1800 {
473+
compatible = "renesas,rz-gpio";
474+
gpio-controller;
475+
#gpio-cells= <2>;
476+
ngpios = <3>;
477+
reg = <0x1800>;
478+
status = "disabled";
479+
};
252480
};
253481

254482
sci0: sci0@80001000 {

‎tests/drivers/gpio/gpio_basic_api/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
/*
2+
* Copyright (c) 2025 Renesas Electronics Corporation
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
/ {
7+
resources {
8+
compatible = "test-gpio-basic-api";
9+
out-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
10+
in-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
11+
};
12+
};
13+
14+
&pinctrl {
15+
input_test: input_test {
16+
group1 {
17+
pinmux = <RZT_PINMUX(PORT_02, 0, 0)>;
18+
input-enable;
19+
};
20+
};
21+
};
22+
23+
&irq4 {
24+
trigger-type = "falling";
25+
pinctrl-0 = <&input_test>;
26+
pinctrl-names = "default";
27+
status = "okay";
28+
};
29+
30+
&gpio2 {
31+
irqs = <0 4>;
32+
status = "okay";
33+
};

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