soc: imxrt: Clean up INIT_VIDEO_PLL config

Don't force select the INIT_VIDEO_PLL config so that board level can
unset it. Also clean up the code a bit in soc.c files.

Signed-off-by: Declan Snyder <[email protected]>

Author: decsny

soc/nxp/imxrt/imxrt10xx/Kconfig

@@ -73,7 +73,6 @@ config SOC_MIMXRT1052
 	select HAS_MCUX_SEMC
 	select CPU_HAS_FPU_DOUBLE_PRECISION
 	select CPU_HAS_ARM_MPU
-	select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
 	select HAS_MCUX_USDHC1
 	select HAS_MCUX_USDHC2
 	select HAS_MCUX_FLEXCAN
@@ -89,7 +88,6 @@ config SOC_MIMXRT1062
 	select HAS_MCUX_SNVS
 	select CPU_HAS_FPU_DOUBLE_PRECISION
 	select CPU_HAS_ARM_MPU
-	select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
 	select HAS_MCUX_USDHC1
 	select HAS_MCUX_USDHC2
 	select HAS_MCUX_FLEXCAN
@@ -107,7 +105,6 @@ config SOC_MIMXRT1064
 	select HAS_MCUX_SRC
 	select CPU_HAS_FPU_DOUBLE_PRECISION
 	select CPU_HAS_ARM_MPU
-	select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
 	select HAS_MCUX_USDHC1
 	select HAS_MCUX_USDHC2
 	select HAS_MCUX_FLEXCAN
@@ -132,4 +129,9 @@ config INIT_PLL6_500M
 		   SOC_MIMXRT1021 || SOC_MIMXRT1024
 	select INIT_ENET_PLL
 
+config INIT_VIDEO_PLL
+	default y if DISPLAY_MCUX_ELCDIF
+	depends on !SOC_MIMXRT1011 && !SOC_MIMXRT1015 && \
+		   !SOC_MIMXRT1021 && !SOC_MIMXRT1024
+
 endif # SOC_SERIES_IMXRT10XX

soc/nxp/imxrt/imxrt10xx/soc.c

@@ -57,15 +57,6 @@ const clock_sys_pll_config_t sysPllConfig = {
 	};
 #endif
 
-#ifdef CONFIG_INIT_VIDEO_PLL
-const clock_video_pll_config_t videoPllConfig = {
-	.loopDivider = 31,
-	.postDivider = 8,
-	.numerator = 0,
-	.denominator = 0,
-};
-#endif
-
 #ifdef CONFIG_NXP_IMXRT_BOOT_HEADER
 const __imx_boot_data_section BOOT_DATA_T boot_data = {
 #ifdef CONFIG_XIP
@@ -152,6 +143,12 @@ __weak void clock_init(void)
 	}
 
 #ifdef CONFIG_INIT_VIDEO_PLL
+	static const clock_video_pll_config_t videoPllConfig = {
+		.loopDivider = 31,
+		.postDivider = 8,
+		.numerator = 0,
+		.denominator = 0,
+	};
 	CLOCK_InitVideoPll(&videoPllConfig);
 #endif
 

soc/nxp/imxrt/imxrt11xx/Kconfig

@@ -23,7 +23,6 @@ config SOC_SERIES_IMXRT11XX
 	select HAS_MCUX_FLEXSPI
 	select HAS_MCUX_FLEXCAN
 	select CPU_HAS_ARM_MPU
-	select INIT_VIDEO_PLL
 	select HAS_MCUX_EDMA
 	select CPU_HAS_ICACHE if CPU_CORTEX_M7
 	select CPU_HAS_DCACHE if CPU_CORTEX_M7
@@ -67,4 +66,7 @@ config ADJUST_LDO
 	default y
 	bool "Adjust LDO setting"
 
+config INIT_VIDEO_PLL
+	default y
+
 endif # SOC_SERIES_IMXRT11XX

soc/nxp/imxrt/imxrt11xx/soc.c

@@ -65,29 +65,6 @@ static const clock_sys_pll2_config_t sysPll2Config = {
 	.ssEnable = false,
 };
 
-#ifdef CONFIG_INIT_VIDEO_PLL
-static const clock_video_pll_config_t videoPllConfig = {
-	/* PLL Loop divider, valid range for DIV_SELECT divider value: 27 ~ 54. */
-	.loopDivider = 41,
-	/* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 */
-	.postDivider = 0,
-	/*
-	 * 30 bit numerator of fractional loop divider,
-	 * Fout = Fin * ( loopDivider + numerator / denominator )
-	 */
-	.numerator = 1,
-	/*
-	 * 30 bit denominator of fractional loop divider,
-	 * Fout = Fin * ( loopDivider + numerator / denominator )
-	 */
-	.denominator = 960000,
-	/* Spread spectrum parameter */
-	.ss = NULL,
-	/* Enable spread spectrum or not */
-	.ssEnable = false,
-};
-#endif
-
 #if CONFIG_USB_DC_NXP_EHCI
 usb_phy_config_struct_t usbPhyConfig = {
 	BOARD_USB_PHY_D_CAL,
@@ -277,10 +254,31 @@ __weak void clock_init(void)
 	/* Init System Pll3 pfd3. */
 	CLOCK_InitPfd(kCLOCK_PllSys3, kCLOCK_Pfd3, 22);
 
-#ifdef CONFIG_INIT_VIDEO_PLL
-	/* Init Video Pll. */
-	CLOCK_InitVideoPll(&videoPllConfig);
-#endif
+	static const clock_video_pll_config_t videoPllConfig = {
+		/* PLL Loop divider, valid range for DIV_SELECT divider value: 27 ~ 54. */
+		.loopDivider = 41,
+		/* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 */
+		.postDivider = 0,
+		/*
+		 * 30 bit numerator of fractional loop divider,
+		 * Fout = Fin * ( loopDivider + numerator / denominator )
+		 */
+		.numerator = 1,
+		/*
+		 * 30 bit denominator of fractional loop divider,
+		 * Fout = Fin * ( loopDivider + numerator / denominator )
+		 */
+		.denominator = 960000,
+		/* Spread spectrum parameter */
+		.ss = NULL,
+		/* Enable spread spectrum or not */
+		.ssEnable = false,
+	};
+
+	if (IS_ENABLED(CONFIG_INIT_VIDEO_PLL)) {
+		/* Init Video Pll. */
+		CLOCK_InitVideoPll(&videoPllConfig);
+	}
 
 	/* Module clock root configurations. */
 	/* Configure M7 using ARM_PLL_CLK */