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342 | 342 | /omit-if-no-ref/ pwm_out_p5_7_ccu81_ch0_high: pwm_out_p5_7_ccu81_ch0_high {
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343 | 343 | pinmux = <XMC4XXX_PINMUX_SET(5, 7, 3)>;
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344 | 344 | };
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| 345 | + /omit-if-no-ref/ i2c_sda_p0_5_u1c0: i2c_sda_p0_5_u1c0 { |
| 346 | + pinmux = <XMC4XXX_PINMUX_SET(0, 5, 2)>; /* USIC sda-src = DX0B */ |
| 347 | + }; |
| 348 | + /omit-if-no-ref/ i2c_sda_p3_5_u0c1: i2c_sda_p3_5_u0c1 { |
| 349 | + pinmux = <XMC4XXX_PINMUX_SET(3, 5, 4)>; /* USIC sda-src = DX0A */ |
| 350 | + }; |
| 351 | + /omit-if-no-ref/ i2c_sda_p5_1_u0c0: i2c_sda_p5_1_u0c0 { |
| 352 | + pinmux = <XMC4XXX_PINMUX_SET(5, 1, 1)>; /* USIC sda-src = DX0A */ |
| 353 | + }; |
| 354 | + /omit-if-no-ref/ i2c_sda_p1_5_u0c0: i2c_sda_p1_5_u0c0 { |
| 355 | + pinmux = <XMC4XXX_PINMUX_SET(1, 5, 2)>; /* USIC sda-src = DX0A */ |
| 356 | + }; |
| 357 | + /omit-if-no-ref/ i2c_sda_p2_14_u1c0: i2c_sda_p2_14_u1c0 { |
| 358 | + pinmux = <XMC4XXX_PINMUX_SET(2, 14, 2)>; /* USIC sda-src = DX0D */ |
| 359 | + }; |
| 360 | + /omit-if-no-ref/ i2c_sda_p2_5_u0c1: i2c_sda_p2_5_u0c1 { |
| 361 | + pinmux = <XMC4XXX_PINMUX_SET(2, 5, 2)>; /* USIC sda-src = DX0B */ |
| 362 | + }; |
| 363 | + /omit-if-no-ref/ i2c_sda_p5_0_u2c0: i2c_sda_p5_0_u2c0 { |
| 364 | + pinmux = <XMC4XXX_PINMUX_SET(5, 0, 1)>; /* USIC sda-src = DX0B */ |
| 365 | + }; |
| 366 | + |
| 367 | + /omit-if-no-ref/ i2c_scl_p2_4_u0c1: i2c_scl_p2_4_u0c1 { |
| 368 | + pinmux = <XMC4XXX_PINMUX_SET(2, 4, 2)>; /* USIC scl-src = DX1A */ |
| 369 | + }; |
| 370 | + /omit-if-no-ref/ i2c_scl_p0_11_u1c0: i2c_scl_p0_11_u1c0 { |
| 371 | + pinmux = <XMC4XXX_PINMUX_SET(0, 11, 2)>; /* USIC scl-src = DX1A */ |
| 372 | + }; |
| 373 | + /omit-if-no-ref/ i2c_scl_p5_2_u2c0: i2c_scl_p5_2_u2c0 { |
| 374 | + pinmux = <XMC4XXX_PINMUX_SET(5, 2, 1)>; /* USIC scl-src = DX1A */ |
| 375 | + }; |
| 376 | + /omit-if-no-ref/ i2c_scl_p3_6_u0c1: i2c_scl_p3_6_u0c1 { |
| 377 | + pinmux = <XMC4XXX_PINMUX_SET(3, 6, 4)>; /* USIC scl-src = DX1B */ |
| 378 | + }; |
| 379 | + /omit-if-no-ref/ i2c_scl_p1_1_u0c0: i2c_scl_p1_1_u0c0 { |
| 380 | + pinmux = <XMC4XXX_PINMUX_SET(1, 1, 2)>; /* USIC scl-src = DX1A */ |
| 381 | + }; |
| 382 | + /omit-if-no-ref/ i2c_scl_p3_0_u0c1: i2c_scl_p3_0_u0c1 { |
| 383 | + pinmux = <XMC4XXX_PINMUX_SET(3, 0, 2)>; /* USIC scl-src = DX1B */ |
| 384 | + }; |
| 385 | + /omit-if-no-ref/ i2c_scl_p0_10_u1c1: i2c_scl_p0_10_u1c1 { |
| 386 | + pinmux = <XMC4XXX_PINMUX_SET(0, 10, 2)>; /* USIC scl-src = DX1A */ |
| 387 | + }; |
| 388 | + /omit-if-no-ref/ i2c_scl_p0_8_u0c0: i2c_scl_p0_8_u0c0 { |
| 389 | + pinmux = <XMC4XXX_PINMUX_SET(0, 8, 2)>; /* USIC scl-src = DX1B */ |
| 390 | + }; |
345 | 391 | };
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