Add TI LP-MSPM0L1117 board

boards/ti/lp_mspm0l1117/Kconfig.lp_mspm0l1117

@@ -0,0 +1,5 @@
+# Copyright (c) 2024 Texas Instruments
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_LP_MSPM0L1117
+	select SOC_MSPM0L1117

boards/ti/lp_mspm0l1117/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: lp_mspm0l1117
+  full_name: MSPM0L1117 Launchpad
+  vendor: ti
+  socs:
+    - name: mspm0l1117

boards/ti/lp_mspm0l1117/doc/index.rst

@@ -0,0 +1,130 @@
+.. zephyr:board:: lp_mspm0l1117
+
+Overview
+********
+
+MSPM0L111x microcontrollers (MCUs) are part of the MSP highly-integrated, ultra-low-power 32-bit MCU
+family based on the enhanced Arm® Cortex®-M0+ core platform operating at up to 32MHz frequency. These
+cost-optimized MCUs offer high-performance analog peripheral integration and excellent low-power current
+consumption. The MCUs also support extended temperature ranges from -40°C to 125°C and operate with
+supply voltages ranging from 1.62V to 3.6V.
+
+The device has up to 128KB of embedded flash memory with built-in error correction code (ECC) and up
+to 16KB SRAM. The flash memory is organized into two main banks to support field firmware updates, with
+address swap support provided between the two main banks.
+
+Hardware
+********
+
+Launchpad MSPM0L1117 provides the following hardware components:
+
+- MSPM0L1117SPTR SoC
+- Arm® 32-bit Cortex®-M0+ CPU with memory protection unit, frequency up to 32MHz
+- VDD from 1.62 V to 3.6 V
+- 128 KB Flash
+- 16 KB SRAM with ECC or parity
+- GPIO with external interrupt capability
+- 1 12-bit ADC with 13 channels
+- RTC
+- Four timers supporting up to 14 PWM outputs
+- Watchdog Timers (2)
+- UART (2)
+- I2C (1)
+- SPI (1)
+- DMA Controller
+
+.. image:: img/LP-MSPM0L1117.png
+     :align: center
+     :alt: MSPM0L1117 LaunchPad development board
+
+Zephyr uses the ``lp_mspm0l1117`` board for building LP_MSPM0L1117
+
+Features:
+*********
+
+- Onboard XDS110 debug probe
+- EnergyTrace technology available for ultra-low-power debugging
+- 2 buttons, 1 LED and 1 RGB LED for user interaction
+
+Details on the MSPM0L1117 LaunchPad can be found on the `TI LP_MSPM0L1117 Product Page`_.
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Building and Flashing
+*********************
+
+Building
+========
+
+Follow the :ref:`getting_started` instructions for Zephyr application development.
+
+For example, to build the blinky application for the MSPM0L1117 LaunchPad:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: lp_mspm0l1117
+   :goals: build
+
+The resulting ``zephyr.bin`` binary in the build directory can be flashed onto
+MSPM0L1117 LaunchPad using the steps mentioned below.
+
+Flashing
+========
+
+Open OCD is used to program the flash memory on the devices. It may be necessary in
+earlier versions to use a branch of open OCD onto the device.
+
+Before OpenOCD is public, one can clone `This Repo <https://github.com/openocd-org/openocd.git>`_,
+and then this can be built with
+
+.. code-block:: console
+
+   $ cd <cloned_OPENOCD_dir>
+   $ ./bootstrap (when building from the git repository)
+   $ ./configure
+   $ make
+   $ sudo make install
+
+Then after the build, it is possible to flash the device by passing additional arguments to the flash command
+
+.. code-block:: console
+
+   $ west flash --openocd <path to cloned dir>/src/openocd --openocd-search <path to cloned dir>/tcl
+
+Flashing using JLINK
+
+.. code-block:: console
+
+   $ west flash --runner jlink
+
+Debugging
+=========
+
+You can debug an application in the usual way. Here is an example for the
+:zephyr:code-sample:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: lp_mspm0l1117
+   :goals: debug
+
+References
+**********
+
+TI MSPM0 MCU Page:
+   https://www.ti.com/microcontrollers-mcus-processors/arm-based-microcontrollers/arm-cortex-m0-mcus/overview.html
+
+TI MSPM0L1117 Product Page:
+   https://www.ti.com/product/MSPM0L1117
+
+TI MSPM0 SDK:
+   https://www.ti.com/tool/MSPM0-SDK
+
+.. _MSPM0L1117 TRM:
+   https://www.ti.com/lit/slau847
+
+.. _TI LP_MSPM0L1117 Product Page:
+   https://www.ti.com/tool/LP-MSPM0L1117

boards/ti/lp_mspm0l1117/lp_mspm0l1117.dts

@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2025 Texas Instruments
+ * Copyright (c) 2025 Linumiz GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <ti/mspm0/l/mspm0l1117.dtsi>
+#include <ti/mspm0/l/mspm0l111x-pinctrl.dtsi>
+#include <zephyr/dt-bindings/clock/mspm0_clock.h>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "TI LP_MSPM0L1117/MSPM0L1117";
+	compatible = "ti,mspm0l1117";
+
+	aliases {
+		led0 = &led0;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,code-partition = &code_partition;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0: led_0 {
+			gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
+			label = "RED LED";
+		};
+	};
+};
+
+&flash0 {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		code_partition: partition@0 {
+			label = "code_partition";
+			reg = <0x00000000 DT_SIZE_K(128)>;
+		};
+	};
+};
+
+&pinctrl {
+	status = "okay";
+};
+
+&gpioa {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_tx_pa10 &uart0_rx_pa11>;
+	pinctrl-names = "default";
+};

boards/ti/lp_mspm0l1117/lp_mspm0l1117.yaml

@@ -0,0 +1,14 @@
+identifier: lp_mspm0l1117
+name: TI MSPM0L1117 Launchpad
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+ram: 16
+flash: 128
+supported:
+  - gpio
+  - pinctrl
+  - uart
+vendor: ti

boards/ti/lp_mspm0l1117/lp_mspm0l1117_defconfig

@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_CLOCK_CONTROL=y

boards/ti/lp_mspm0l1117/support/openocd.cfg

@@ -0,0 +1,4 @@
+source [find interface/xds110.cfg]
+adapter speed 10000
+
+source [find target/ti_mspm0.cfg]

drivers/gpio/gpio_mspm0.c

@@ -49,6 +49,17 @@ static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
 };
 #elif CONFIG_SOC_SERIES_MSPM0L /* if CONFIG_SOC_SERIES_MSPM0L */
 #define GPIOA_NODE DT_NODELABEL(gpioa)
+#if CONFIG_SOC_MSPM0L1117
+#define NUM_GPIOA_PIN 30
+#define gpioa_pins    NUM_GPIOA_PIN
+static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
+	IOMUX_PINCM1,  IOMUX_PINCM2,  IOMUX_PINCM7,  IOMUX_PINCM8,  IOMUX_PINCM9,  IOMUX_PINCM10,
+	IOMUX_PINCM11, IOMUX_PINCM14, IOMUX_PINCM19, IOMUX_PINCM20, IOMUX_PINCM21, IOMUX_PINCM22,
+	IOMUX_PINCM34, IOMUX_PINCM35, IOMUX_PINCM36, IOMUX_PINCM37, IOMUX_PINCM38, IOMUX_PINCM39,
+	IOMUX_PINCM40, IOMUX_PINCM41, IOMUX_PINCM42, IOMUX_PINCM46, IOMUX_PINCM47, IOMUX_PINCM53,
+	IOMUX_PINCM54, IOMUX_PINCM55, IOMUX_PINCM59, IOMUX_PINCM60, IOMUX_PINCM3,  IOMUX_PINCM6,
+};
+#elif
 #define NUM_GPIOA_PIN 31
 #define gpioa_pins    NUM_GPIOA_PIN
 static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
@@ -59,6 +70,7 @@ static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
 	IOMUX_PINCM68, IOMUX_PINCM69, IOMUX_PINCM73, IOMUX_PINCM74, IOMUX_PINCM3,  IOMUX_PINCM4,
 	IOMUX_PINCM5
 };
+#endif  /* CONFIG_SOC_MSPM0L1117 */
 #else
 #error "Series lookup table not supported"
 #endif /* if CONFIG_SOC_SERIES_MSPM0G */
@@ -78,6 +90,15 @@ static uint8_t gpiob_pincm_lut[NUM_GPIOB_PIN] = {
 };
 #elif CONFIG_SOC_SERIES_MSPM0L /* if CONFIG_SOC_SERIES_MSPM0L */
 #define GPIOB_NODE DT_NODELABEL(gpiob)
+#if CONFIG_SOC_MSPM0L1117
+#define NUM_GPIOB_PIN 14
+#define gpiob_pins    NUM_GPIOB_PIN
+static uint8_t gpiob_pincm_lut[NUM_GPIOB_PIN] = {
+	IOMUX_PINCM15, IOMUX_PINCM16, IOMUX_PINCM23, IOMUX_PINCM24, IOMUX_PINCM25, IOMUX_PINCM26,
+	IOMUX_PINCM31, IOMUX_PINCM32, IOMUX_PINCM33, IOMUX_PINCM43, IOMUX_PINCM44, IOMUX_PINCM45,
+	IOMUX_PINCM48, IOMUX_PINCM52
+};
+#elif
 #define NUM_GPIOB_PIN 32
 #define gpiob_pins    NUM_GPIOB_PIN
 static uint8_t gpiob_pincm_lut[NUM_GPIOB_PIN] = {
@@ -88,18 +109,21 @@ static uint8_t gpiob_pincm_lut[NUM_GPIOB_PIN] = {
 	IOMUX_PINCM66, IOMUX_PINCM70, IOMUX_PINCM71, IOMUX_PINCM72, IOMUX_PINCM21, IOMUX_PINCM22,
 	IOMUX_PINCM23, IOMUX_PINCM24
 };
+#endif /* CONFIG_SOC_MSPM0L1117 */
 #endif /* CONFIG_SOC_SERIES_MSPM0G */
 #endif /* DT_NODE_HAS_STATUS(DT_NODELABEL(gpiob), okay) */
 
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(gpioc), okay)
 #define GPIOC_NODE DT_NODELABEL(gpioc)
 #ifdef CONFIG_SOC_SERIES_MSPM0L
+#if !defined(CONFIG_SOC_MSPM0L1117)
 #define NUM_GPIOC_PIN 10
 #define gpioc_pins    NUM_GPIOC_PIN
 static uint8_t gpioc_pincm_lut[NUM_GPIOC_PIN] = {
 	IOMUX_PINCM43, IOMUX_PINCM44, IOMUX_PINCM45, IOMUX_PINCM46, IOMUX_PINCM47,
 	IOMUX_PINCM48, IOMUX_PINCM58, IOMUX_PINCM59, IOMUX_PINCM60, IOMUX_PINCM61,
 };
+#endif /* !CONFIG_SOC_MSPM0L1117 */
 #endif /* CONFIG_SOC_SERIES */
 #endif /* DT_NODE_HAS_STATUS(DT_NODELABEL(gpioc), okay) */
 

soc/ti/mspm0/mspm0l/Kconfig

@@ -17,6 +17,9 @@ config SOC_SERIES_MSPM0L
 	select CLOCK_CONTROL
 	select SOC_EARLY_INIT_HOOK
 
+config SOC_MSPM0L1117
+	select CPU_HAS_ARM_MPU
+
 config SOC_MSPM0L2227
 	select CPU_HAS_ARM_MPU