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1 change: 1 addition & 0 deletions doc/build/kconfig/preprocessor-functions.rst
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@ while the ``*_hex`` version returns a hexadecimal value starting with ``0x``.
$(dt_compat_on_bus,<compatible string>,<bus>)
$(dt_gpio_hogs_enabled)
$(dt_has_compat,<compatible string>)
$(dt_highest_controller_irq_number,<node path>,<cell>)
$(dt_node_array_prop_has_val,<node path>,<prop>,<value>)
$(dt_node_array_prop_hex,<node path>,<prop>,<index>[,<unit>])
$(dt_node_array_prop_int,<node path>,<prop>,<index>[,<unit>])
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11 changes: 11 additions & 0 deletions doc/releases/migration-guide-4.4.rst
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Expand Up @@ -941,6 +941,17 @@ STM32
the ``cs-gpios`` or new ``st,soft-nss`` property operate in "Soft NSS" mode, while all other
instances operate in "Hard NSS" mode.

* :kconfig:option:`CONFIG_NUM_IRQS` is computed automatically based on active (``status = "okay";``)
devices by using the new ``dt_highest_controller_irq_number`` Kconfig preprocessor function.
Applications which register custom ISRs (using :c:macro:`IRQ_CONNECT()`) may encounter build
failures such as the following due to :kconfig:option:`CONFIG_NUM_IRQS` having a lower value:

.. code-block::

gen_isr_tables.py: error: IRQ 114 (offset=0) exceeds the maximum of 106

Explicitly set :kconfig:option:`CONFIG_NUM_IRQS` to an appropriate value to solve these issues.

Timer
=====

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5 changes: 5 additions & 0 deletions doc/releases/release-notes-4.4.rst
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Expand Up @@ -1415,6 +1415,11 @@ DeviceTree
* :c:macro:`DT_CHILD_BY_UNIT_ADDR_INT`
* :c:macro:`DT_INST_CHILD_BY_UNIT_ADDR_INT`

Kconfig
*******

* Added new preprocessor function ``dt_highest_controller_irq_number`` (:github:`104819`)

Kernel
******

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42 changes: 42 additions & 0 deletions scripts/kconfig/kconfigfunctions.py
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Expand Up @@ -1076,6 +1076,47 @@

return "n"

def dt_highest_controller_irq_number(kconfig, _, path, irq_cell_name):

Check failure on line 1079 in scripts/kconfig/kconfigfunctions.py

View check run for this annotation

SonarQubeCloud / SonarCloud Code Analysis

Refactor this function to reduce its Cognitive Complexity from 18 to the 15 allowed.

See more on https://sonarcloud.io/project/issues?id=zephyrproject-rtos_zephyr&issues=AZyzRRuG9SAi947i0NPL&open=AZyzRRuG9SAi947i0NPL&pullRequest=104819
"""
Given the path to an interrupt controller node and the name of an
`interrupts` cell containing the "IRQ number" (an integer), returns
the highest "IRQ number" value among all enabled nodes that generate
an interrupt on the specified controller.
If the interrupt controller node does not exist, the provided cell name
is invalid, or the cell type is invalid, 0 will be returned.
"""
if doc_mode or edt is None:
return "0"

try:
irqc = edt.get_node(path)
except edtlib.EDTError:
return "0"

irqns = set()
for node in irqc.required_by:
# Only examine active nodes
if node.status != "okay":
continue

for irq in node.interrupts:
# Only examine cells pointing to target interrupt controller
if irq.controller != irqc:
continue

if (irqn := irq.data.get(irq_cell_name)) is None:
continue

if not isinstance(irqn, int):
continue

irqns.add(irqn)

if len(irqns) == 0:
return "0"

return str(max(irqns))

def normalize_upper(kconf, _, string):
"""
Expand Down Expand Up @@ -1258,6 +1299,7 @@
"dt_gpio_hogs_enabled": (dt_gpio_hogs_enabled, 0, 0),
"dt_chosen_partition_addr_int": (dt_chosen_partition_addr, 1, 3),
"dt_chosen_partition_addr_hex": (dt_chosen_partition_addr, 1, 3),
"dt_highest_controller_irq_number": (dt_highest_controller_irq_number, 2, 2),
"normalize_upper": (normalize_upper, 1, 1),
"shields_list_contains": (shields_list_contains, 1, 1),
"substring": (substring, 2, 3),
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9 changes: 9 additions & 0 deletions soc/st/stm32/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,15 @@ config CLOCK_CONTROL
config CORTEX_M_SYSTICK
default n if STM32_LPTIM_TIMER

# Compute IRQ table size automatically using DT for Cortex-M.
# dt_highest_controller_irq_number() returns zero-based IRQn,
# increment it to obtain the table size (= max IRQn + 1)
DT_NVIC_PATH := /soc/interrupt-controller@e000e100
DT_NVIC_MAX_IRQN := $(dt_highest_controller_irq_number,$(DT_NVIC_PATH),irq)

configdefault NUM_IRQS
default $(inc,$(DT_NVIC_MAX_IRQN)) if $(dt_path_enabled,$(DT_NVIC_PATH))

# Reduce kernel stack sizes to fit MCUs with 8 KiB RAM or less
config MAIN_STACK_SIZE
default 320 if SRAM_SIZE <= 2
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2 changes: 0 additions & 2 deletions soc/st/stm32/stm32c0x/Kconfig.defconfig
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Expand Up @@ -5,8 +5,6 @@

if SOC_SERIES_STM32C0X

rsource "Kconfig.defconfig.stm32c0*"

if PM

config COUNTER
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2 changes: 0 additions & 2 deletions soc/st/stm32/stm32c5x/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,6 @@

if SOC_SERIES_STM32C5X

rsource "Kconfig.defconfig.stm32c5*"

config ROM_START_OFFSET
default 0x400 if BOOTLOADER_MCUBOOT

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2 changes: 0 additions & 2 deletions soc/st/stm32/stm32f0x/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,6 @@

if SOC_SERIES_STM32F0X

rsource "Kconfig.defconfig.stm32f0*"

config SRAM_VECTOR_TABLE
default y

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